High signal level compliant input/output circuits

A signal driver for an interface circuit, said signal driver comprising:

• an input node adapted to accept signals at a first signal level or lower;
• a first output node adapted to output signals at a plurality of different signal levels, said plurality of signal levels including said first signal level and a second signal level, wherein said second signal level is greater than said first signal level;
• a first stage level shifter coupled to said input node and operable to level shift an accepted signal to said first signal level;
• a first second stage level shifter coupled to said first stage level shifter and said first output node and operable to selectively output a level shifted signal provided by said first stage level shifter at said first signal level or said second signal level,
• wherein electronic components of said first stage level shifter and said first second stage level shifter have a reliability limit less than said second signal level, and wherein said first and second stage level shifters are configured to apply to said electronic components only a terminal to terminal signal level within said reliability limit when processing signals for output at said second signal level;
• a second output node adapted to output signals at said first signal level;
• and
• a second stage level shifter coupled to said first stage level shifter and said second output node and operable to facilitate matching propagation delays associated with signals provided to said first output node and said second output node.

A method comprising:

• providing a first stage level shifter for accepting a signal for driving an interface output and outputting said signal at a first signal level;
• providing a second, stage level shifter for accepting an output of said first stage level shifter and outputting said signal for driving the interface output at a second signal level;
• providing a bias voltage circuit to said second stage level shifter adapted to apply to electronic components of said second stage level shifter only terminal to terminal signal levels less than said second signal level when said second stage level shifter is operable to output said signal for driving the interface output at said second signal level;
• and
• adapting said second stage level shifter to selectively output signals at said first signal level and said second signal level;
• wherein said bias voltage circuit is adapted to provide a first bias voltage to said second stage level shifter when processing signals for output at said first signal level and a second bias voltage to said second stage level shifter when processing signals for output at said second signal level, said first bias voltage being less than said second bias voltage;
• and
• wherein said bias voltage circuit is further adapted to generate a bias voltage when a host power supply is unavailable.