Motor rotation irregularity detection circuit
AssigneeMitsubishi Electric Corporation
InventorsKazumasa Nakai, Masayuki Ota
Life of this patent
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Abstract
A motor rotation irregularity detection circuit includes a first integrator for integrating a rotation detection signal that is output from a driver of a sensor-less motor; a differentiator for outputting a difference between a binary signal based on the integral in the first integrator and the rotation detection signal; a second integrator for integrating an output signal of the differentiator; a comparator for making a comparison between the integral in the second integrator and a reference voltage to output an irregularity detection signal; and an output terminal for outputting a signal coming from the comparator.
Claims6
A motor rotation irregularity detection circuit comprising:
- a first integrator for integrating a rotation detection signal representing rotation of a motor;
- a differentiator for outputting a difference between a binary signal based on an integral in said first integrator and said rotation detection signal;
- a second integrator for integrating an output signal of said differentiator;
- and
- a signal output unit for outputting an irregularity detection signal when an integral in said second integrator falls below a reference voltage.
A motor rotation irregularity detection circuit comprising:
- a first integrator for integrating a rotation detection signal representing the rotation of a motor;
- a first differentiator for outputting a difference between a binary signal based on an integral in said integrator and said rotation detection signal;
- a second integrator for integrating an output signal of said first differentiator;
- a first signal output unit for outputting a low-level signal when an integral in said second integrator falls below a first reference voltage;
- a third integrator for integrating an output signal of said first signal output unit;
- a second differentiator for outputting a difference between a binary signal based on an integral in said third integrator and an output signal of said first signal output unit;
- a fourth integrator for integrating an output signal of said second differentiator;
- a second signal output unit for outputting a high-level signal when an integral in said fourth integrator exceeds a second reference voltage;
- an inverter for inverting and outputting an output signal of said second signal output unit;
- and
- an AND arithmetic unit for computing a logical product of an output signal of said inverter and the output signal of said first signal output unit.
Dependencies are inferred from the claim text.