Method of manufacturing an integrated circuit
AssigneeNXP B.V.
InventorsStephane Morel, Arnoldus Den Dekker, Elisabeth C. Rodenburg, Eric C. E. Van Grunsven
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Abstract
An integrated circuit is provided that comprises a substrate of silicon and an interconnect in a through-hole extending from the first to the second side of the substrate. The interconnect is coupled to a metallization layer on the first side of the substrate and is provided on an amorphous silicon layer that is present at a side wall of the through-hole, and particularly at an edge thereof adjacent to the first side of the substrate. The interconnect comprises a metal stack of nickel and silver. A preferred way of forming the amorphous silicon layer is a sputter etching technique.
Claims14
A method of manufacturing an integrated circuit comprising a substrate of semiconductor material with a first and an opposite second side, comprising the steps of:
- providing a metallization layer on the first side of the substrate;
- forming a through-hole extending from the first to the second side of the substrate, and providing a sidewall of the through-hole with an electrically conductive layer to form an interconnect coupled to the metallization layer on the first side of the substrate, wherein prior to provision of the electrically conductive layer an amorphous silicon layer is formed, via etching, in the through-hole, and the electrically conductive layer is of a composition that lessens the damage to the amorphous silicon layer.
A method of manufacturing an integrated circuit comprising a substrate of semiconductor material with a first and an opposite second side, comprising the steps of:
- providing a metallization layer on the first side of the substrate;
- forming a through-hole extending from the first to the second side of the substrate, and providing a sidewall of the through-hole with an electrically conductive layer to form an interconnect coupled to the metallization layer on the first side of the substrate, wherein prior to provision of the electrically conductive layer an amorphous silicon layer is formed in the through-hole,
- wherein the amorphous silicon layer is formed by sputter etching, and
- the electrically conductive layer is of a composition that the amorphous silicon layer is not damaged.
An integrated circuit comprising a substrate of semiconductor material with a first and an opposite second side, on which first side a metallization layer is present, while a through-hole with a side wall extends from the first to the second side of the substrate, on which side wall an electrically conductive layer is present to form an interconnect, which interconnect is coupled to the metallization layer on the first side of the substrate, wherein an etched amorphous silicon layer is present-in the through-hole, and the electrically conductive layer is of a composition that lessens damage to the amorphous silicon layer.
Dependencies are inferred from the claim text.