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US 8,138,084 B2Granted
Electroless Cu plating for enhanced self-forming barrier layers
AssigneeIntel Corporation
InventorRohan N. Akolkar
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Abstract
Methods and an apparatus are described for an integrated circuit within which an electroless Cu plated layer having an oxygen content is formed on the top of a seed layer comprising Cu and Mn. The integrated circuit is then exposed to a sufficient high temperature to cause the self-formation of a MnSiOx barrier layer.
Claims29
A method, comprising:
- providing a dielectric layer having a trench;
- forming a seed layer comprising Cu and Mn in the trench;
- electroless plating a Cu layer having an oxygen content over the seed layer to fill up the trench, wherein the oxygen content is greater than 1 atomic percent;
- and
- exposing the filled trench to a high temperature, wherein the high temperature is sufficient to form a MnSiOx layer.
2 more elements
A method, comprising:
- providing a dielectric layer having a trench;
- forming a seed layer comprising Cu and Mn in the trench;
- electroless-plating a Cu layer having an oxygen content over the seed layer, wherein the oxygen content is greater than 1 atomic percent;
- electro-plating a Cu layer over the electroless Cu plated layer to fill up the trench;
- and
- exposing the filled trench to a high temperature, wherein the high temperature is sufficient to form a MnSiOx layer.
3 more elements
A method, comprising:
- providing a dielectric layer having a trench, wherein the dielectric layer comprises a porous dielectric material;
- forming a seed layer comprising Cu and Mn in the trench;
- electroless plating a Cu layer having an oxygen content greater than 1 atomic percent over the seed layer in the trench;
- filling the trench with Cu to form a filled trench;
- and
- exposing the filled trench to a high temperature, wherein the high temperature is sufficient to form a MnSiOx layer.
3 more elements
Dependencies are inferred from the claim text.