Printed circuit board design support program, recording medium, and printed circuit board design support method
AssigneeCanon Kabushiki Kaisha
InventorToshisato Sadamatsu
Life of this patent
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AssigneeCanon Kabushiki Kaisha
InventorToshisato Sadamatsu
Estimating the term…
To automatically arrange vias on a printed circuit board so as to satisfy a predetermined condition. A printed circuit board design support method for causing a computer to execute a ground conductive area identifying conductive areas which can be used as grounds of a printed circuit board having a plurality of conductive layers, an extracting an overlapping conductive area in which the conductive areas identified in the ground conductive area identifying are two-dimensionally overlapped with one another, and an automatic arranging interlayer connection members configured to electrically connect at least two layers with one another among the plurality of conductive areas in the overlapping conductive area extracted in the extracting at an interval within a predetermined distance.
A method, comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.