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US 8,136,069 B2Granted
Accurate approximation of resistance in a wire with irregular biasing and determination of interconnect capacitances in VLSI layouts in the presence of Catastrophic Optical Proximity Correction
AssigneeInternational Business Machines Corporation
InventorsLewis William Dewey, III, Ibrahim M. Elfadel, David J. Widiger
Life of this patent
Estimating the term…
Abstract
The Width Bias Calculator (WBC) calculates electrical values by effectively averaging the electrical values to either side of a target wire shape whereby values are approximated for design validation without a significant impact on performance or memory consumption.
Claims15
An apparatus for calculating an approximate electrical performance value for a target wire shape, having a left neighbor and a right neighbor shape in a chip, when using a Design Automated Application (DA application) that is limited to determining one of two possible distances to a neighbor wire shape of the target wire shape at any one time, comprising:
- a computer connected to a memory and to a database;
- and
- a DA application and a Bias Calculation (BC) program in the memory;
- wherein the BC program contains a plurality of instructions to cause a processor of the computer to interact with the DA application and to:
- pass a scanline over the target wire shape to generate data;
- determine from the data, a first separation distance from the left neighbor;
- responsive to determining the first separation distance, biasing a width of the target wire shape symmetrically using the first separation distance to determine a first bias width;
- calculate, using the first bias width, a first electrical performance value for the target wire shape;
- determine, from the data, a second separation distance from the right neighbor;
- responsive to determining the second separation distance, bias the width of the target wire shape symmetrically using the second separation distance to determine a second bias width;
- calculate, using the second bias width, a second electrical performance value for the target wire shape;
- calculate the approximate electrical performance value by averaging the first value and the second value to obtain the approximate electrical performance value;
- and
- using the approximate electrical performance value to validate a design specification of the chip.
11 more elements
A computer implemented method comprising:
- loading a Bias Calculation program (BC program) into a memory connected to a computer, the memory containing a Design Automated Software Application (DA application), the DA application limited to determining one of two possible distances to a neighbor wire shape of a target wire shape at any one time;
- using the BC program, interfacing with the DA application, and causing a processor of the computer to perform steps comprising:
- passing a scanline over the target wire shape to generate data;
- determining from the data, a first separation distance from the left neighbor;
- responsive to determining the first separation distance, biasing a width of the target wire shape symmetrically using the first separation distance to determine a first bias width;
- calculating, using the first bias width, a first electrical performance value for the target wire shape;
- determining, from the data, a second separation distance from the right neighbor;
- responsive to determining the second separation distance, biasing the width of the target wire shape symmetrically using the second separation distance to determine a second bias width;
- calculating, using the second bias width, a second electrical performance value for the target wire shape;
- calculating an approximate electrical performance value for the target wire shape, by averaging the first electrical performance value and the second electrical performance value to obtain the approximate electrical performance value;
- and
- using the approximate electrical performance value to validate a design specification of a chip.
9 more elements
A computer program product comprising:
- a non-transitory computer readable storage device, the computer readable storage device containing a plurality of instructions configured to cause a computer to perform steps comprising:
- interfacing with a Design Automated Software Application (DA application) that is limited to determining one of two possible distances to a neighbor wire shape of the target wire shape at any one time;
- passing a scanline over the target wire shape to generate data;
- determining from the data, a first separation distance from the left neighbor;
- responsive to determining the first separation distance, biasing a width of the target wire shape symmetrically using the first separation distance to determine a first bias width;
- calculating, using the first bias width, a first electrical performance value for the target wire shape;
- determining, from the data, a second separation distance from the right neighbor;
- responsive to determining the second separation distance, biasing the width of the target wire shape symmetrically using the second separation distance to determine a second bias width;
- calculating, using the second bias width, a second electrical performance value for the target wire shape;
- and
- using the approximate electrical performance value to validate a design specification of a chip.
8 more elements
Dependencies are inferred from the claim text.