Indeterminate state logic insertion

A data processing system for resolving indeterminate states by inserting logic into a design, the data processing system comprising:

• a bus;
• a memory connected to the bus, the memory storing computer-executable instructions;
• a processor unit connected to the bus, wherein the processor unit executes the computer-executable instructions to:
• receive an original design input from a requester to form a received original design input;
• determine whether an output pin in the received original design input is measured at an indeterminate output value;
• generate a temporary design file from the received original design input that contains all inputs and a predetermined determinate output value to replace the indeterminate output value in response to a determination that the output pin in the received original design input is measured at an indeterminate output value;
• update the temporary design file by generating a first predetermined replacement value of “1” for all input combinations where an indeterminate value is measured on an original output and generating a second predetermined replacement value of “0” for all input combinations where a determinate value is measured on the original output;
• synthesize the received original design input and the temporary design file to form a synthesized original design input and a synthesized temporary design file;
• merge the synthesized original design input with the synthesized temporary design file to form a final design;
• and
• return the final design to the requester.

A computer program product stored on a non-transitory computer-readable storage medium having computer-executable instructions stored thereon that are executable by a computer for resolving indeterminate states by inserting logic into a design, the computer program product comprising:

• computer-executable instructions for receiving an original design input from a requester to form a received original design input;
• computer-executable instructions for determining whether an output pin in the received original design input is measured at an indeterminate output value;
• computer-executable instructions for generating a temporary design file from the received original design input that contains all inputs and a predetermined determinate output value to replace the indeterminate output value in response to a determination that the output pin in the received original design input is measured at an indeterminate output value;
• computer-executable instructions for updating the temporary design file by generating a first predetermined replacement value of “1” for all input combinations where an indeterminate value is measured on an original output and generating a second predetermined replacement value of “0” for all input combinations where a determinate value is measured on the original output;
• computer-executable instructions for synthesizing the received original design input and the temporary design file to form a synthesized original design input and a synthesized temporary design file;
• computer-executable instructions for merging the synthesized original design input with the synthesized temporary design file to form a final design;
• and
• computer-executable instructions for returning the final design to the requester.