Burst error correction based on fire code
AssigneeBroadcom Corporation
InventorsMagesh Valliappan, Velu Pillai
Life of this patent
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Abstract
According to an example embodiment, an apparatus may include logic. The apparatus may be configured to: determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block; select a burst error pattern that is less than or equal to M bits, and having no more than Y consecutive zeros within the burst error, where M is greater than the order of the error location polynomial; determine an error pattern syndrome based on the selected burst error pattern and the error location polynomial; and determine an actual location of the burst error in the data block based on the error location syndrome and the error pattern syndrome.
Claims18
An apparatus comprising logic, the apparatus configured to:
- determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block;
- determine a first error pattern syndrome of the burst error based on an error pattern polynomial;
- select, based on the first error pattern syndrome, a burst error pattern of length that is less than or equal to M bits, and having no more than Y consecutive zeros within the burst error, where M is greater than the order of the error location polynomial, including being configured to rotate the first error pattern syndrome until a correctable burst error pattern is found;
- determine a second error pattern syndrome based on the selected burst error pattern and the error location polynomial;
- and
- determine an actual location of the burst error in the data block based on the error location syndrome and the second error pattern syndrome.
An apparatus comprising logic, the apparatus configured to:
- determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block, including being configured to divide a CRC error for the data block by the error location polynomial to obtain a remainder as the error location syndrome;
- select a burst error pattern that is less than or equal to M bits, and having no more than Y consecutive zeros within the burst error, where M is greater than the order of the error location polynomial;
- determine an error pattern syndrome based on the selected burst error pattern and the error location polynomial;
- and
- determine an actual location of the burst error in the data block based on the error location syndrome and the error pattern syndrome.
An apparatus comprising logic, the apparatus being configured to:
- determine an error location syndrome;
- determine an error pattern syndrome;
- rotate the error pattern syndrome until a correctable burst error pattern is found that matches one of a plurality of classes of correctable errors, including:
- 1) a burst error of length that is less than or equal to an order of an error location polynomial;
- or
- 2) a burst error of length that is less than or equal to M bits, and having no more than Y consecutive zeros within the burst error, where M is greater than the order of the error location polynomial;
- and
- determine an actual location of a burst error in a data block based on the error location syndrome and the correctable burst error pattern.
Dependencies are inferred from the claim text.