Data processing apparatus

A data processing apparatus comprising:

• a CPU including a register;
• a cache memory;
• a main memory configured to exchange data with the cache memory;
• a control part configured to control the exchanging of data between the main memory and the cache memory;
• and
• a power supply part configured to supply power to the register, the cache memory, and the main memory;
• wherein the register, the cache memory, and the main memory are each configured to store data and maintain the stored data therein without being supplied with the power from the power supply part;
• wherein the control part is configured to stop the CPU from accessing the register, the cache memory, and the main memory where an abnormality occurs in the power supply part;
• wherein the cache memory is a non-volatile memory.