Semiconductor apparatus including power management integrated circuit
AssigneeSamsung Electronics Co., Ltd.
InventorDong-joon Kim
Life of this patent
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Abstract
Provided is a semiconductor apparatus including a power management integrated circuit. The semiconductor apparatus includes an application processor and a voltage management integrated circuit. The application processor outputs clock information on an operation clock signal, and includes a core circuit. The voltage management integrated circuit receives the clock information from the application processor, and generates and outputs a core voltage having a voltage level corresponding to the clock information in response to the clock information. The operation clock signal is a clock signal, which has a variable frequency and is input to the core circuit of the application processor.
Claims14
A semiconductor apparatus including a power management integrated circuit, the semiconductor apparatus comprising:
- an application processor outputting clock information on an operation clock signal, the application processor comprising a core circuit;
- and
- a voltage management integrated circuit receiving the clock information from the application processor, and generating and outputting a core voltage having a voltage level corresponding to the clock information in response to the clock information,
- wherein the operation clock signal is a clock signal, which has a variable frequency and is input to the core circuit of the application processor,
- wherein the voltage management integrated circuit comprises:
- a clock information detection circuit receiving the clock information from the application processor, and generating a multiplexer (MUX) select signal in response to the clock information;
- and
- a voltage generating device selecting one of a plurality of voltage levels used by the application processor and generating a voltage having the selected voltage level as the core voltage, in response to the MUX select signal.
A semiconductor apparatus including a power management integrated circuit, the semiconductor apparatus comprising:
- an application processor outputting clock information on an operation clock signal, the application processor comprising a core circuit;
- and
- a voltage management integrated circuit receiving the clock information from the application processor, and generating and outputting a core voltage having a voltage level corresponding to the clock information in response to the clock information,
- wherein the operation clock signal is a clock signal, which has a variable frequency and is input to the core circuit of the application processor
- wherein the application processor further comprises a clock generating unit generating the operation clock signal,
- wherein the application processor further comprises the core circuit receiving the operation clock signal and the core voltage, and operating in synchronization with the operation clock signal, and
- wherein the application processor further comprises an interface circuit setting the plurality of voltage levels used by the core circuit and sending the set plurality of voltage levels to the voltage management integrated circuit.
A semiconductor apparatus including a power management integrated circuit, the semiconductor apparatus comprising:
- an application processor outputting clock information on an operation clock signal;
- and
- a voltage management integrated circuit generating and outputting a core voltage in response to the clock information,
- wherein the voltage management integrated circuit comprises:
- a clock information detection circuit receiving the clock information from the application processor, and generating a multiplexer (MUX) select signal in response to the clock information;
- a selection unit storing a plurality of voltage levels used by the application processor, and selecting one of the plurality of voltage levels in response to the MUX select signal;
- and
- a voltage generator generating the core voltage having the selected voltage level, and outputting the core voltage to the application processor, the selected voltage level corresponding to the clock information.
Dependencies are inferred from the claim text.