Integrated memory management and memory management method
AssigneeKabushiki Kaisha Toshiba
InventorsAtsushi Kunimatsu, Hiroto Nakai, Hiroyuki Sakamoto, Kenichi Maeda
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AssigneeKabushiki Kaisha Toshiba
InventorsAtsushi Kunimatsu, Hiroto Nakai, Hiroyuki Sakamoto, Kenichi Maeda
Estimating the term…
An integrated memory management device according to an example of the invention comprises an acquiring unit acquiring a read destination logical address from a processor, an address conversion unit converting the read destination logical address into a read destination physical address of a non-volatile main memory, an access unit reading, from the non-volatile main memory, data that corresponds to the read destination physical address and has a size that is equal to a block size or an integer multiple of the page size of the non-volatile main memory, and transmission unit transferring the read data to a cache memory of the processor having a cache size that depends on the block size or the integer multiple of the page size of the non-volatile main memory.
A memory management device connectable to a non-volatile main memory and a processor comprising:
A memory unit comprising;
A memory management method comprising:
Dependencies are inferred from the claim text.