Instruction set for programmable queuing
AssigneeNet Navigation Systems, LLC
InventorsAndrew Li, Michael Lau, Asad Khamisy
Life of this patent
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Abstract
A traffic manager includes an execution unit that is responsive to instructions related to queuing of data in memory. The instructions may be provided by a network processor that is programmed to generate such instructions, depending on the data. Examples of such instructions include (1) writing of data units (of fixed size or variable size) without linking to a queue, (2) re-sequencing of the data units relative to one another without moving the data units in memory, and (3) linking the previously-written data units to a queue. The network processor and traffic manager may be implemented in a single chip.
Claims8
A device comprising:
- a scheduler configured to schedule queues of data in a payload memory, based on at least one of:
- priority, rate and bandwidth guarantee;
- and
- an execution unit comprising decode logic configured to decode instructions from an instruction set;
- wherein the instruction set comprises:
- a first operation code to write data to the payload memory but not link the data to a queue;
- and
- a second operation code, different than the first operation code, to link the data held in payload memory to the queue.
A method for forming queues in a memory, the method comprising:
- receiving a write instruction, a queue number, and a unit of data from a bus;
- decoding the write instruction;
- executing the write instruction, by storing the unit of data in the memory without linking the unit of data to the queue;
- receiving a stitch instruction;
- decoding the stitch instruction;
- executing the stitch instruction, by changing at least one pointer in the memory;
- receiving a link instruction;
- decoding the link instruction;
- and
- executing the link instruction, by coupling the units of data of the packet to the queue.
Dependencies are inferred from the claim text.