Image processing method and device
AssigneeMarvell International Technology Ltd.
InventorsDouglas G. Keithley, Roy G. Moss
Life of this patent
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Abstract
An image processing method and device for processing multiple rows of pixels of an image simultaneously with a single instruction. The processing includes selecting a pixel window having a plurality of pixels of an image spanning across multiple rows and columns, building vertical and horizontal load registers to include the plurality of pixels of the selected pixel window, and simultaneously processing selected pixels of the plurality of pixels included in the vertical and horizontal load registers using a single instruction, wherein the vertical and horizontal load registers are shifted when the selected pixels are processed. Accordingly, a method and device for efficient processing of an image is provided.
Claims11
An image processing device, comprising:
- a processor for processing multiple rows of pixels of an image simultaneously with a single instruction;
- a plurality of horizontal load registers;
- and
- a plurality of vertical load registers, including a first vertical load register and a second vertical load register;
- wherein the multiple rows of pixels of the image are arranged in (i) the plurality of vertical load registers and (ii) the plurality of horizontal load registers;
- wherein the processor is configured to shift pixels from the first vertical load register to the second vertical load register;
- and
- wherein the processor is further configured to shift at least one pixel corresponding to a bit of each of the plurality of horizontal load registers into the first vertical load register.
A method, comprising:
- building (i) a plurality of vertical load registers and (ii) a plurality of horizontal load registers, to include a plurality of pixels of an image spanning across multiple rows and multiple columns;
- and
- simultaneously processing, by a processor, selected pixels of the plurality of pixels spanning across the multiple rows using a single instruction;
- shifting, by the processor, pixels from a first vertical load register of the plurality of vertical load registers into a second vertical load register of the plurality of vertical load registers;
- and
- shifting, by the processor, pixels corresponding to bits of each of the plurality of horizontal load registers into the first vertical load register.
Dependencies are inferred from the claim text.