CAVLC run before encode with zero cycle costs
AssigneeLSI Corporation
InventorsScott F. James, Eric C. Pearson
Life of this patent
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Abstract
An apparatus including a control circuit and an encoder circuit. The control circuit may configured to generate a first control signal and a second control signal. The encoder circuit may be configured to (i) receive a plurality of coefficients, the first control signal and the second control signal and (ii) generate an encoded signal in response to the plurality of coefficients, the first control signal and the second control signal. The encoder circuit may be further configured to simultaneously encode run before syntax elements with the plurality of coefficients.
Claims20
An apparatus comprising:
- a control circuit configured to generate a first control signal and a second control signal;
- and
- an encoder circuit configured to (i) receive a plurality of coefficients, the first control signal and the second control signal and (ii) generate an encoded signal in response to the plurality of coefficients, the first control signal and the second control signal, wherein said encoder circuit is further configured to simultaneously encode a run before syntax element into a barrel shifter during encoding of a corresponding coefficient of the plurality of coefficients.
A residual block encoder comprising:
- means for generating a first control signal and a second control signal;
- and
- means for generating an encoded signal in response to a plurality of quantized coefficients, the first control signal and the second control signal, wherein a run before syntax element is simultaneously encoded into a barrel shifter during encoding of a corresponding quantized coefficient of the plurality of quantized coefficients.
A method for encoding run before syntax elements with zero cycle costs comprising the steps of:
- generating a first control signal and a second control signal;
- and
- generating an encoded signal in response to a plurality of coefficients, the first control signal and the second control signal, wherein a run before syntax element is simultaneously encoded into a barrel shifter during encoding of a corresponding coefficient of the plurality of coefficients.
Dependencies are inferred from the claim text.