Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorHitoshi Iwai
Life of this patent
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Abstract
A semiconductor memory device comprises a memory unit having a first and a second port and including plural banks; a bank address conversion circuit operative to convert a first bank address fed from external into a second bank address different from the first bank address and operative to supply the first bank address to one of the first and second ports and supply the second bank address to the other of the first and second ports; and a write data conversion circuit operative to convert input data fed from external into write data different from the input data and operative to supply the input data to one of the first and second ports and supply the converted write data to the other of the first and second ports.
Claims20
A semiconductor memory device, comprising:
- a memory unit having a first and a second port and including plural banks;
- a bank address conversion circuit operative to convert a first bank address fed from external into a second bank address different from said first bank address and operative to supply said first bank address to one of said first and second ports and supply said second bank address to the other of said first and second ports;
- and
- a write data conversion circuit operative to convert input data fed from external into write data different from said input data and operative to supply said input data to one of said first and second ports and supply said converted write data to the other of said first and second ports.
A semiconductor memory device, comprising:
- a memory unit having a first and a second port and including plural banks;
- and
- a bank address conversion circuit operative to convert a first bank address fed from external into a second bank address different from said first bank address and operative to supply said first bank address to one of said first and second ports and supply said second bank address to the other of said first and second ports.
A semiconductor memory device, comprising:
- a memory unit having a first and a second port and including plural banks;
- a bank address register operative to store a bank address fed from external;
- a bank address conversion circuit operative to convert said bank address fed from external or said bank address stored in said bank address register into a bank address different from these bank addresses and operative to supply said bank address before conversion to one of said first and second ports and supply said bank address after conversion to the other of said first and second ports;
- and
- a write data conversion circuit operative to convert input data fed from external into write data different from said input data and operative to supply said input data to one of said first and second ports and supply said converted write data to the other of said first and second ports.
Dependencies are inferred from the claim text.