Apparatus and methods for programming multilevel-cell NAND memory devices
AssigneeMicron Technology, Inc.
InventorFrankie F. Roohparvar
Life of this patent
Estimating the term…
Abstract
Methods and apparatus are provided. A first data value is read from a first memory cell and is stored. An attempt is made to add a second data value to the first memory cell. If the attempt to add the second data value to the first memory cell is unsuccessful, the first data value and the second data value are written to one or more other memory cells.
Claims20
A method of operating a memory device, comprising:
- writing first data to a first location of a memory array;
- reading the first data from the first location of the memory array;
- storing the first data read from the first location of the memory array;
- attempting to write second data to the first location of the memory array;
- writing the first and second data to one or more other locations of the memory array if attempting to write the second data to the first location of the memory array is unsuccessful;
- and
- storing a logical address of the first data.
A method of operating a processor of an electronic system, comprising:
- writing first data to a first location of a memory device of the electronic system;
- requesting the first data from the memory device;
- storing the first data requested from the memory device;
- attempting to write second data to the first location of the memory device;
- and
- writing the stored first data and the second data to one or more other locations of the memory device if attempting to write second data to the first location of the memory device fails;
- wherein requesting the first data from the memory device occurs in response to attempting to write the second data to the first location of the memory device.
A method of operating a processor of an electronic system, comprising:
- writing first data to a first location of a memory device of the electronic system;
- requesting the first data from the memory device;
- storing the first data requested from the memory device;
- attempting to write second data to the first location of the memory device;
- writing the stored first data and the second data to one or more other locations of the memory device if attempting to write second data to the first location of the memory device fails;
- requesting a logical address of the first data from the memory device;
- and
- storing the logical address of the first data.
A method of operating a memory device adapted to store multiple logical data pages per physical data page, the method comprising:
- reading a first logical data page of a first physical data page;
- storing the first logical data page in an additional location;
- storing a logical address of the first logical data page;
- attempting to write a second logical data page to the first physical data page;
- and
- if the attempt to write the second logical data page to the first physical data page fails, attempting to write the first logical data page and the second logical data page to one or more other physical data pages of the memory device.
A NAND flash memory device, comprising:
- a memory array comprising multilevel memory cells arranged in rows and columns;
- a storage register coupled to the memory array;
- and
- control logic for control and/or access of the array of non-volatile memory cells;
- wherein the storage register is configured to store a first data value from a first memory cell;
- wherein the control logic is configured to send the first data value from the storage register to a second memory cell in the event of a failure to add a second data value to the first memory cell;
- and
- wherein the storage register is inaccessible from an input/output port of the memory device.
Dependencies are inferred from the claim text.