Semiconductor memory device
AssigneeRenesas Electronics Corporation
InventorKoichi Takeda
Life of this patent
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Abstract
A semiconductor device according to the present invention includes a first memory cell array in which a plurality of first memory cells are arranged as a matrix, data being read from or written to the first memory cells, and a second memory cell array in which a plurality of second memory cells amplifying and storing the data of one of the plurality of the first memory cells arranged in a corresponding column are arranged as a matrix. The first memory cell array and the second memory cell array are arranged face to face in the column direction. An area of the second memory cell is larger than that of the first memory cell. An area of the first memory cell array is twice or more as large as that of the second memory cell array.
Claims15
A semiconductor memory device comprising:
- a first memory cell array in which a plurality of first memory cells are arranged as a matrix, data being read from or written to the first memory cells;
- and
- a second memory cell array in which a plurality of second memory cells amplifying and storing the data of one of the plurality of the first memory cells arranged in a corresponding column are arranged as a matrix, wherein
- the first memory cell array and the second memory cell array are arranged face to face in the column direction;
- an area of the second memory cell is larger than that of the first memory cell;
- and
- an area of the first memory cell array is twice or more as large as that of the second memory cell array.
Dependencies are inferred from the claim text.