Beam light scanning apparatus, image forming apparatus, and method for controlling generation of beam light

A method for controlling generation of a beam light, the method comprising:

• distributing data based on image information per pixel of a target image in each line in a direction of main scan into two-channel data trains made up of an odd-numbered pixel data train and an even-numbered pixel data train;
• writing the odd-numbered pixel data train and the even-numbered pixel data train into a first memory and a second memory, respectively, in parallel in response to a line sync signal, the first memory being provided corresponding to the odd-numbered pixel data train and allowing reading and writing of the odd-numbered pixel data train, and the second memory being provided corresponding to the even-numbered pixel data train and allowing reading and writing of the even-numbered pixel data train;
• reading the odd-numbered pixel data train and the even-numbered pixel data train out of the first memory and the second memory, respectively, in parallel during the same processing cycle corresponding to the line sync signal;
• combining the odd-numbered pixel data train and the even-numbered pixel data train read out of the first memory and the second memory, respectively, into a data train in the original order of pixels in each line;
• generating a driving signal with pulse width modulation based on the combined data train using a single Pulse Width Modulator;
• and
• driving, by the generated driving signal, a light source which emits a beam light for scan of an image forming apparatus.

A beam light scanning apparatus comprising:

• a light source configured to emit a beam light for scan of an image forming apparatus;
• an interface configured to distribute data based on image information per pixel of a target image in each line in a direction of main scan into two-channel data trains made up of an odd-numbered pixel data train and an even-numbered pixel data train;
• a first memory provided corresponding to the odd-numbered pixel data train, the first memory allowing reading and writing of the odd-numbered pixel data train;
• a second memory provided corresponding to the even-numbered pixel data train, the second memory allowing reading and writing of the even-numbered pixel data train;
• a data writing circuit configured to write the odd-numbered pixel data train and the even-numbered pixel data train distributed by the interface into the first memory and the second memory, respectively, in parallel in response to a line sync signal;
• a data reading circuit configured to read the odd-numbered pixel data train and the even-numbered pixel data train out of the first memory and the second memory, respectively, in parallel during the same processing cycle corresponding to the line sync signal;
• a multiplexer configured to combine the odd-numbered pixel data train and the even-numbered pixel data train read out of the first memory and the second memory, respectively, by the data reading circuit into a data train in the original order of pixels in each line;
• a single Pulse Width Modulator configured to generate a driving signal with pulse width modulation based on the data train combined by the multiplexer;
• and
• a laser driver configured to drive the light source by the generated driving signal.