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US 8,134,405 B2Granted
Semiconductor device and timing control method for the same
AssigneeElpida Memory, Inc.
InventorsHideyuki Yoko, Ryuuji Takishita
Life of this patent
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Abstract
A semiconductor device includes a power-supply control portion and a latch portion. The power-supply control portion supplies power to an internal circuit in response to an input signal synchronized with rising of clock. The latch portion latches the input signal in synchronization with falling of the clock and supplies the latched input signal to the internal circuit.
Claims10
A device comprising:
- a first main power supply line receiving a first power voltage;
- a first auxiliary power supply line;
- a second main power supply line receiving a second power voltage;
- a second auxiliary power supply line;
- a first transistor inserted between the first main power supply line and the first auxiliary power supply line, and connecting, when rendered conductive, the first main power supply line with the first auxiliary power supply line;
- a second transistor inserted between the second main power supply line and the second auxiliary power supply line, and connecting, when rendered conductive, the second main power supply line with the second auxiliary power supply line;
- an internal circuit coupled between the first auxiliary power supply line and the second auxiliary power supply line, and activated in response to appearance of a voltage between the first auxiliary power supply line and the second auxiliary power supply line to perform a circuit operation on an input signal supplied thereto;
- and
- a control circuit coupled to the first and second transistors and the internal circuit and including first, second and third circuit portions, the first circuit portion being responsive to a command signal to generate the input signal and supplying the input signal to both of the second and third circuit portions, the second circuit portion receiving the input signal and rendering the first and second transistors conductive in response to the input signal, and the third circuit portion receiving the input signal from the first circuit portion and supplying the input signal to the internal circuit after the first and second transistors have been rendered conductive,
- wherein the control circuit receives a clock, the first circuit portion of the control circuit generates the input signal in response to one of rising and falling edges of the clock, the second circuit portion of the control circuit renders the first and second transistors conductive in response to the one of rising and falling edges of the clock, and the third circuit portion of the control circuit supplies the input signal to the internal circuit in response to the other of the rising and falling edges of the clock following the one of the rising and falling edges of the clock.
7 more elements
A device comprising:
- first and second power supply lines;
- a first transistor coupled between the first and the second power supply lines, and connecting, when rendered conductive, the second power supply line with the first power supply line;
- an internal circuit coupled to at least one of the first and the second power supply lines, and receiving an input signal;
- a control circuit including first, second and third circuit portions, the first circuit portion being responsive to a command signal to generate an input signal and supplying the input signal to both of the second and third circuit portions, the second circuit portion coupled to the first transistor, receiving the input signal and supplying the input signal to the first transistor, and the third circuit portion coupled to the internal circuit, receiving the input signal, the third circuit portion supplying the input signal to the internal circuit after the first transistor has received the input signal supplied from the second circuit portion of the control circuit,
- wherein the control circuit receives a clock, the first circuit portion of the control circuit generates the input signal in response to one of rising and falling edges of the clock, the second circuit portion of the control circuit supplies the input signal to the first transistor in response to the one of rising and falling edges of the clock, and the third circuit portion of the control circuit supplies the input signal to the internal circuit in response to the other of the rising and falling edges of the clock following the one of the rising and falling edges of the clock.
2 more elements
A device comprising:
- a first main power supply line receiving a first power voltage;
- a first auxiliary power supply line;
- a second main power supply line receiving a second power voltage;
- a first transistor inserted between the first main power supply line and the first auxiliary power supply line, and connecting, when rendered conductive, the first main power supply line with the first auxiliary power supply line;
- a control circuit including first, second and third circuit portions, the first circuit portion being responsive to a command signal to generate an input signal and supplying the input signal to both the second and third circuit portions, the second circuit portion receiving the input signal and rendering the first transistor conductive in response to the input signal, and the third circuit portion receiving at a first input node thereof the input signal from the first circuit portion and at a second input node thereof a clock and transferring the input signal to an output node thereof in response to the clock after the first transistor has been rendered conductive;
- and
- an internal circuit including a first power node coupled to the first auxiliary power supply line, a second power node coupled to the second power supply line and an input terminal coupled to the output node of the third circuit portion of the control circuit, the internal circuit being activated by the second circuit portion rendering the first transistor conductive in response to the input signal and thereafter performing a circuit operation on the input signal transferred through the input terminal from the third circuit portion,
- wherein the control circuit receives the clock, the first circuit portion of the control circuit generates the input signal in response to one of rising and falling edges of the clock, the second circuit portion of the control circuit renders the first transistor conductive in response to the one of rising and falling edges of the clock, and the third circuit portion of the control circuit supplies the input signal to the internal circuit in response to the other of the rising and falling edges of the clock following the one of the rising and falling edges of the clock.
5 more elements
Dependencies are inferred from the claim text.