US 8,134,349 B2Granted

Power supply circuit that outputs a voltage stepped down from a power supply voltage

AssigneeKabushiki Kaisha Toshiba

InventorsHidehiro Shiga, Shinichiro Shiratake, Daisaburo Takashima

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Abstract

A power supply circuit has a constant voltage circuit, a first MOS transistor, a second MOS transistor, a third MOS transistor, a first voltage dividing circuit that outputs a first divided voltage obtained by dividing the voltage of the output terminal by a first voltage dividing ratio, and a first differential amplifier circuit which is fed with a reference voltage and the first divided voltage and has an output connected to a gate of the second MOS transistor. The first differential amplifier circuit outputs a signal to turn on the second MOS transistor when the first divided voltage is higher than the reference voltage, and the first differential amplifier circuit outputs a signal to turn off the second MOS transistor when the first divided voltage is lower than the reference voltage.

Claims15

Dependent claims

A power supply circuit that outputs a voltage stepped down from a power supply voltage, comprising:

a constant voltage circuit that outputs a constant voltage;
a first MOS transistor having one end connected to ground and a gate fed with a fixed voltage;
a second MOS transistor having one end connected to an other end of the first MOS transistor;
a third MOS transistor which is connected between an other end of the second MOS transistor and the power supply and has a gate connected to an output of the constant voltage circuit;
an output terminal connected between the second MOS transistor and the third MOS transistor to output the output voltage stepped down from the power supply voltage;
a first voltage dividing circuit that outputs a first divided voltage obtained by dividing the voltage of the output terminal by a first voltage dividing ratio;
and
a first differential amplifier circuit which is fed with a reference voltage and the first divided voltage and has an output connected to a gate of the second MOS transistor,
wherein the first differential amplifier circuit outputs a signal to turn on the second MOS transistor when the first divided voltage is higher than the reference voltage, and
the first differential amplifier circuit outputs a signal to turn off the second MOS transistor when the first divided voltage is lower than the reference voltage.

7 more elements

A power supply circuit that outputs a voltage stepped down from a power supply voltage, comprising:

an output terminal that outputs the output voltage stepped down from the power supply voltage;
a first constant voltage circuit that outputs a first constant voltage;
a second constant voltage circuit that outputs a second constant voltage;
a first MOS transistor having one end connected to ground and a gate fed with a fixed voltage;
a second MOS transistor which is a pMOS transistor connected between an other end of the first MOS transistor and the output terminal and having a gate connected to an output of the second constant voltage circuit;
and
a third MOS transistor which is an nMOS transistor connected between the output terminal and a power supply and having a gate connected to an output of the first constant voltage circuit;
wherein the first constant voltage is set at or below a sum of a threshold voltage of the third MOS transistor and a target voltage which is a target value of the output voltage, and
the second constant voltage is set higher than the sum of the target voltage and a threshold voltage of the second MOS transistor.

6 more elements

A power supply circuit that outputs a voltage stepped down from a power supply voltage, comprising:

an output terminal that outputs the output voltage stepped down from the power supply voltage;
a constant voltage circuit that outputs a constant voltage;
a first MOS transistor having one end connected to ground and a gate fed with a fixed voltage;
a second MOS transistor which is a pMOS transistor connected between an other end of the first MOS transistor and the output terminal;
a third MOS transistor which is an nMOS transistor connected between the output terminal and a power supply and having a gate connected to an output of the constant voltage circuit;
a fourth MOS transistor having one end connected to the ground and a gate fed with the fixed voltage;
a fifth MOS transistor which is a diode-connected pMOS transistor having one end connected to an other end of the fourth MOS transistor and a gate of the second MOS transistor;
and
a sixth MOS transistor which is a diode-connected nMOS transistor connected between an other end of the fifth MOS transistor and the output of the constant voltage circuit,
wherein the fifth MOS transistor has a threshold voltage set at or above a threshold voltage of the second MOS transistor, and
the sixth MOS transistor has a threshold voltage set at or below a threshold voltage of the third MOS transistor.

8 more elements

Dependencies are inferred from the claim text.