Implanted well breakdown in high voltage devices

An integrated circuit, comprising:

• an n-type isolation structure, further comprising:
• an n-type BISO layer overlapping a boundary between a p-type substrate and a p-type epitaxial layer, such that a top surface of said n-type BISO layer is lower than a top surface of said p-type epitaxial layer, and said n-type BISO layer is formed in a different area than an NBL;
• and
• a shallow n-well formed in said p-type epitaxial layer over said n-type BISO layer, extending from said top surface of said p-type epitaxial layer to, and overlapping a top surface of, said n-type BISO layer, wherein an average doping density in said shallow n-well is less than 1019 atoms/cm2.

A method of forming an integrated circuit, comprising the steps of:

• providing a p-type substrate;
• ion implanting an NBL set of n-type dopants into an area of said p-type substrate defined for said NBL;
• ion implanting a BISO set of n-type dopants into an area of said p-type substrate defined for an n-type BISO layer which is different than said area defined for said NBL;
• annealing said p-type substrate whereby said BISO set of n-type dopants diffuse outward into said p-type substrate;
• forming a p-type epitaxial layer on a top surface of said p-type substrate such that said BISO set of n-type dopants diffuses upward into said p-type epitaxial layer between one-third and two-thirds of a vertical thickness of said p-type epitaxial layer;
• and
• forming a shallow n-well in said p-type epitaxial layer over said n-type BISO layer, extending from a top surface of said p-type epitaxial layer to, and overlapping a top surface of, said n-type BISO layer, wherein an average doping density in said shallow n-well is less than 1019 atoms/cm2.