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US 8,134,169 B2Granted
Patterned substrate for hetero-epitaxial growth of group-III nitride film
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Ding-Yuan Chen
Life of this patent
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Abstract
A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.
Claims17
A circuit structure comprising:
- a substrate having a top surface;
- and
- a film over the substrate and comprising a plurality of portions allocated as a plurality of rows, wherein each of the plurality of rows of the plurality of portions comprises:
- a plurality of convex portions, wherein each of the plurality of convex portions is substantially over the top surface of the substrate;
- and
- a plurality of concave portions, wherein each of the plurality of concave portions is substantially below the top surface of the substrate, wherein in each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern, and wherein each of the plurality of convex portions is separated from neighboring ones of the concave portions by dielectric masks.
3 more elements
A circuit structure comprising:
- a silicon substrate;
- a group-III nitride film over the silicon substrate, wherein the group-III nitride film comprises a plurality of portions physically disconnected from each other, wherein the plurality of portions forms an array comprising a plurality of rows and columns, and wherein the plurality of portions of the group-III nitride film comprises:
- convex portions;
- and
- concave portions, wherein the convex portions and the concave portions are allocated in an alternating pattern in each of the plurality of rows and each of the plurality of columns;
- faceted structures over a top surface of the silicon substrate, wherein the convex portions are directly over the faceted structures;
- and
- faceted openings extending from the top surface of the silicon substrate into the silicon substrate, wherein the concave portions are in the faceted openings, and wherein the faceted structures and exposed surfaces of the silicon substrate in the faceted openings have (111) surface orientations.
5 more elements
A circuit structure comprising:
- a silicon substrate having a top surface;
- a plurality of faceted structures on the top surface of the silicon substrate, wherein the plurality of faceted structures has slopes with (111) surface orientations;
- a plurality of faceted openings extending from the top surface of the silicon substrate into the silicon substrate, wherein surfaces of the silicon substrate in the plurality of faceted openings are sloped and have (111) surface orientations;
- a gallium nitride (GaN) film comprising:
- a plurality of convex portions physically disconnected from each other, and directly over the plurality of faceted structures;
- and
- a plurality of concave portions physically disconnected from each other, and in the faceted openings, wherein the plurality of convex portions and the plurality of concave portions are allocated in a checkerboard pattern;
- and
- a dielectric mask on the top surface of the silicon substrate, wherein the dielectric mask separates the plurality of convex portions and the plurality of concave portions from each other.
6 more elements
Dependencies are inferred from the claim text.