Method of manufacturing semiconductor integrated circuit device
AssigneeRenesas Electronics Corporation
InventorsKota Funayama, Hiraku Chakihara
Life of this patent
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Abstract
In the present invention, in the exposure to light of a memory cell array or the like of a semiconductor memory or the like, when a group of unit openings for etching the STI trench regions in which the unit openings for etching the STI trench regions each having a rectangular shape are arranged in rows and columns are transferred by the exposure onto a negative resist film, multiple exposure is appropriately used which includes a first exposure step using a first optical mask having a group of first linear openings extending in a column direction and a second exposure step using a second optical mask having a group of second linear openings extending in a row direction.
Claims10
A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:
- (a) forming a negative resist film over a first main surface of a wafer;
- (b) forming, in the resist film over a portion of the first main surface serving as a memory cell array, a plurality of unit openings each having a rectangular shape longer in a row direction than in a column direction into a matrix arranged in the column direction and the row direction;
- (c) after the step (b), in a state where there is the resist film, performing an etching process to the first main surface to form STI trench regions in the first main surface;
- (d) forming a buried insulating film over the first main surface so as to be buried in the STI trench regions;
- and
- (e) performing a planarization process to the buried insulating film located outside the STI trench regions to form a group of STI regions arranged in a matrix,
- wherein the step (b) includes the sub-steps of:
- (b1) exposing the negative resist film to light using a first optical mask having a group of first linear openings extending in the column direction;
- (b2) exposing the negative resist film to light using a second optical mask having a group of second linear openings extending in the row direction;
- and
- (b3) after the steps (b1) and (b2), developing the negative resist film to form the unit openings.
Dependencies are inferred from the claim text.