US 8,133,767 B2 · Efficient interconnect structure for electrical fuse applications

Abstract

A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.

Claims8

Dependent claims

A method of forming a semiconductor structure including a high EM resistant interconnect structure and a lower EM resistant fuse structure located within a same interconnect level, said method comprising:

providing an upper interconnect level atop a lower interconnect level, said upper interconnect level including a dielectric material having an interconnect area and a fuse area;
forming at least one conductive feature within said dielectric material in said interconnect area and at least one other conductive feature within said dielectric material in said fuse area;
selectively forming a surface oxide layer on an upper exposed surface of each of said at least one other conductive feature embedded within said dielectric material in said fuse area;
and
forming a dielectric capping layer on said surface oxide layer and extending atop said dielectric material in said fuse area, said dielectric capping layer is also located atop said dielectric material and said at least one conductive feature of said interconnect area.

2 more elements

Dependencies are inferred from the claim text.

Efficient interconnect structure for electrical fuse applications

Life of this patent

Efficient interconnect structure for electrical fuse applications

Life of this patent

Abstract

Claims8