US 8,079,084 B1Granted

Virus co-processor instructions and methods for using such

AssigneeFortinet, Inc.

InventorsLin Huang, Xu Zhou, Michael Xie

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Abstract

Various embodiments of the present invention provide elements that may be utilized for improved virus processing. As one example, a computer readable medium is disclosed that includes a virus signature compiled for execution on a virus co-processor. The virus signature includes at least one primitive instruction and at least one CPR instruction stored at contiguous locations in the computer readable medium. The CPR instruction is one of an instruction set that includes, but is not limited to: a compare string instruction, compare buffer instruction; perform checksum instruction; a seek instruction; and a test instruction. The primitive instruction may be, but is not limited to, an add instruction, a branch instruction, a jump instruction, a load instruction, a move instruction, a logic AND instruction, a logic OR instruction, and/or a logic XOR instruction.

Claims19

Dependent claims

A virus processing system, the virus processing system comprising:

a virus co-processor supporting virus processing by hardware accelerating execution of a plurality of virus signatures complied for hardware execution on the virus co-processor;
a first memory communicably coupled to the virus co-processor via a first memory interface, wherein the first memory includes a first virus signature of the plurality of virus signatures compiled for execution on the virus co-processor, and wherein the first virus signature includes at least one primitive instruction and at least one Content Pattern Recognition (CPR) instruction stored at contiguous locations in the first memory;
an interconnect bus;
a general purpose processor, wherein the general purpose processor is communicably coupled to the virus co-processor via the interconnect bus;
and
a second memory communicably coupled to the virus co-processor via a second memory interface and to the general purpose processor, wherein the second memory includes a second virus signature compiled for execution on the general purpose processor.

3 more elements

A method for virus processing, the method comprising:

providing a virus processing hardware accelerator embodied as a virus co-processor that is communicably coupled to a first memory via a first memory interface and to a second memory via a second memory interface, wherein the first memory includes a first virus signature compiled for hardware execution on the virus co-processor, and wherein the first virus signature includes at least one primitive instruction and at least one Content Pattern Recognition (CPR) instruction stored at contiguous locations in the first memory, and wherein the second memory includes a second virus signature compiled for software execution;
and
providing a general purpose processor, wherein the general purpose processor is communicably coupled to the virus co-processor via an interconnect bus and to the second memory;
receiving a data segment, by the general purpose processor;
scanning the data segment, by the general purpose processor, including applying the second virus signature against the data segment by software executing the second virus signature;
and
causing, by the general purpose processor, the virus co-processor to scan the data segment, including hardware executing the first virus signature to apply the first virus signature against the data segment by
storing the data segment to the second memory;
and
indicating a request for a virus scan to the virus co-processor.

7 more elements

Dependencies are inferred from the claim text.