Non-volatile semiconductor memory device

A non-volatile semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells arrayed capable of storing information in accordance with variations in threshold voltage;
• a likelihood calculator having a plurality of likelihood calculation algorithms for deriving a likelihood value about a stored data bit from a quantized value of the threshold voltage read out of the memory cell;
• an error correction unit configured to execute error correction through iterative processing using the likelihood value obtained at the likelihood calculator;
• and
• a likelihood calculator controller configured to change among the likelihood calculation algorithms in the likelihood calculator based on a certain value of the number of errors corrected in the error correction unit.

A non-volatile semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells arrayed capable of storing information in accordance with variations in threshold voltage;
• a likelihood calculator having a plurality of likelihood calculation algorithms for deriving a likelihood value about a stored data bit from a quantized value of the threshold voltage read out of the memory cell;
• an error correction unit configured to execute error correction through iterative processing using the likelihood value obtained at the likelihood calculator;
• a rewrite controller operative to measure and store the number of rewrite operations executed at each address in the memory cell array;
• and
• a likelihood calculator controller configured to change among the likelihood calculation algorithms in the likelihood calculator based on a certain value of the number of rewrite operations stored in the rewrite controller.

A non-volatile semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells arrayed capable of storing information in accordance with variations in threshold voltage;
• a likelihood calculator having a plurality of likelihood calculation algorithms for deriving a likelihood value about a stored data bit from a quantized value of the threshold voltage read out of the memory cell;
• an error correction unit configured to execute error correction through iterative processing using the likelihood value obtained at the likelihood calculator;
• a memory cell information storage unit operative to store the characteristic concerning a threshold voltage of a memory cell at each address in the memory cell array;
• and
• a likelihood calculator controller configured to read the characteristic information stored in the memory cell information storage unit based on address information about the read-executed memory cell and set a likelihood calculation algorithm based on the characteristic information.

A non-volatile semiconductor memory device, comprising:

• a memory cell array including a plurality of memory cells arrayed capable of storing information in accordance with variations in threshold voltage;
• a likelihood calculator having a plurality of likelihood calculation algorithms for deriving a likelihood value about a stored data bit from a quantized value of the threshold voltage read out of the memory cell;
• an error correction unit configured to execute error correction through iterative processing using the likelihood value obtained at the likelihood calculator;
• and
• a likelihood calculator controller configured to change among the likelihood calculation algorithms in the likelihood calculator;
• wherein the memory cell includes pilot memory cells in which a threshold voltage to be programmed is determined in advance per address, and
• the likelihood calculator controller changes among the likelihood calculation algorithms based on a quantized value of the threshold voltage read out from the pilot memory cell.