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US 8,078,891 B2Granted
Method, device, and system for guaranteed minimum processor power state dwell time
AssigneeIntel Corporation
InventorTerry Fletcher
Life of this patent
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Abstract
A method, device, and system are disclosed. In one embodiment the method includes causing a processor to enter into a first power state. Then an interrupt is received that signals the processor to leave the first power state. The method continues by causing the processor to remain in the first power state if the interrupt was received less than a minimum dwell time after the processor entered the first power state.
Claims17
A method, comprising:
- causing a processor to enter into a first power state;
- receiving an interrupt to signal the processor to leave the first power state;
- causing the processor to remain in the first power state if the interrupt was received less than a minimum dwell time after the processor entered the first power state;
- determining an average time between interrupts to the processor over a determined length of time in the first power state;
- and
- increasing the minimum dwell time when the average time between interrupts is less than a determined break even interrupt rate value.
3 more elements
A device, comprising:
- a power management microcontroller to:
- cause a processor to enter into a first power state, the processor to receive an interrupt to signal the processor to leave the first power state;
- cause the processor to remain in the first power state if the interrupt was received less than a minimum dwell time after the processor entered the first power state;
- determine an average time between interrupts to the processor over a determined length of time in the first power state;
- and
- increase the minimum dwell time when the average time between interrupts is less than a determined break even interrupt rate value.
3 more elements
A system, comprising:
- an interconnect;
- a processor coupled to the interconnect;
- and
- a memory coupled to the interconnect, the memory to store software to program a minimum dwell time for the processor in a C6 power state;
- and
- a power management microcontroller, coupled to the interconnect, the power management microcontroller to:
- cause the processor to enter into the C6 power state;
- receive an interrupt to signal the processor to leave the C6 power state;
- cause the processor to remain in the C6 power state if the interrupt was received less than a minimum dwell time after the processor entered the C6 power state;
- determine an average time between interrupts to the processor over a determined length of time in the C6 power state;
- and
- increase the minimum dwell time when the average time between interrupts is less than a determined break even interrupt rate value.
9 more elements
Dependencies are inferred from the claim text.