Processor array accessing data in memory array coupled to output processor with feedback path to input sequencer for storing data in different pattern
AssigneeNXP B.V.
InventorsRichard P. Kleihorst, Antench A. Abbo, Vishal S. Choudhary
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Abstract
An integrated circuit arrangement has a processor array (2) with processor elements (4) and a memory (6) with memory elements (8) arranged in rows (32) and columns (30). The columns (30) of memory elements (8) are addressed by respective processor elements (4). An input sequencer (14) and feedback path (24) cooperate to reorder input data in the memory (6) to carry out both block and line based processing.
Claims15
An integrated circuit arrangement, comprising:
- a processor array with a plurality of processor elements for processing data in parallel;
- a memory array including a plurality of memory elements accessible in parallel by the plurality of processor elements;
- a data input for accepting data;
- an input sequencer arranged to accept input data and to store data in the memory elements of the memory array;
- an output processor for taking data from the memory array;
- and
- a controller for controlling the processor array;
- the integrated circuit arrangement further comprising a feedback path from the output processor to the input sequencer, the input sequencer being arranged to accept input data from the data input and from the feedback path and the output processor being arranged to take data from the memory array and to output the data from the memory array on an output of the output processor and to send the data from the memory array back to the input sequencer along the feedback path.
A method of operating an integrated circuit arrangement having an input sequencer, a processor array with plurality of processor elements for processing data in parallel, a memory array having a plurality of memory elements accessible in parallel by the plurality of processor elements;
- an output processor for taking data from the memory array and a feedback path from the output processor to the input sequencer, the method comprising:
- accepting input data in the input sequencer;
- storing the input data in the memory elements in a first pattern;
- and
- outputting the data from the memory elements and sending the output data back through the output processor, the feedback path and the input sequencer and back into the memory elements in a different second pattern.
A non-transitory computer program product including computer program code means arranged to cause a processor array with a plurality of processor elements for processing data in parallel;
- a memory array including a plurality of memory elements accessible in parallel by the plurality of processor elements;
- a data input for accepting data;
- an input sequencer arranged to accept input data and to store data in the memory elements of the memory array;
- an output processor for taking data from the memory array;
- and
- a controller for controlling the processor array;
- the integrated circuit arrangement further comprising a feedback path from the output processor to the input sequencer, the input sequencer being arranged to accept input data from the data input and from the feedback path and the output processor being arranged to take data from the memory array and to output the data from the memory array on an output of the output processor and to send the data from the memory array back to the input sequencer along the feedback path to execute the method comprising:
- accepting input data in the input sequencer;
- storing the input data in the memory elements in a first pattern;
- and
- outputting the data from the memory elements and sending the output data back through the output processor, the feedback path and the input sequencer and back into the memory elements in a different second pattern.
Dependencies are inferred from the claim text.