Bridge fused multiply-adder circuit
AssigneeBoard of Regents, The University of Texas System
InventorsEric Quinnell, Earl E. Swartzlander, Jr., Carl Lemonds
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Abstract
A bridge fused multiply-adder is disclosed. The fused multiply-adder is for the single instruction execution of (A×B)+C. The bridge fused multiply-add unit adds this functionality to existing floating-point co-processor units by including a fused multiply-add hardware “bridge” between an existing floating-point adder and a floating-point multiplier unit. This fused multiply-add functionality is added to existing two-operand architecture designs without degrading the performance or parallel pipe execution of floating-point adder and floating-point multiplier instructions.
Claims5
A bridge fused multiply-adder circuit, comprising:
- a floating-point adder;
- a floating-point multiplier;
- an alignment/inversion module, coupled to said floating-point adder, for sharing an input with said floating-point adder;
- and
- a bridge module, coupled to said floating-point adder and said floating-point multiplier, for combining a partial product from said floating-point multiplier with an output from said alignment/inversion module to generate an un-rounded output to be fed to said floating-point adder to produce a fused multiply-add result.
Dependencies are inferred from the claim text.