Preamble acquisition without second order timing loops
AssigneeLink—A—Media Devices Corporation
InventorsHaitao Xia, Shih-Ming Shih, Ryan Yu, Marcus Marrow, Kai Keung Chan
Life of this patent
Estimating the term…
Loading patent…
AssigneeLink—A—Media Devices Corporation
InventorsHaitao Xia, Shih-Ming Shih, Ryan Yu, Marcus Marrow, Kai Keung Chan
Estimating the term…
A clock is adjusted by obtaining a first plurality of samples and a second plurality of samples associated with a preamble portion of a data packet. The first plurality of samples and the second plurality of samples are sampled using a clock. A first intermediate value is determined based at least in part on the first plurality of samples and a second intermediate value is determined based at least in part on the second plurality of samples. An ending value associated with an end of the preamble portion is determined based at least in part on the first intermediate value and the second intermediate value. The clock is adjusted based at least in part on the ending value without use of a second order timing loop.
A system for adjusting a clock, comprising:
A method for adjusting a clock, comprising:
A computer program product for adjusting a clock, the computer program product being embodied in a computer readable storage medium and comprising computer instructions for:
Dependencies are inferred from the claim text.