Quarter duty cycle pulse generator for interleaved switching mixer
AssigneeFreescale Semiconductor, Inc.
InventorsKurt B. Hausmann, Mark A. Kirschenmann, Lillian G. Lent
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AssigneeFreescale Semiconductor, Inc.
InventorsKurt B. Hausmann, Mark A. Kirschenmann, Lillian G. Lent
Estimating the term…
An integrated transmit circuit includes a voltage controlled oscillator (702) for generating an input frequency signal (e.g., VCO) that is provided to a divide by two quadrature generator circuit (706) which generates therefrom in-phase and quadrature clocking signals (I, IB, Q, QB) that are applied to control a plurality of transmission gates (711-718) configured in a matched switching topology (710) so as to selectively pass pulses from the input frequency signal, thereby generating interleaved LO pulses (Ø1, Ø1B, . . . Ø4, Ø4B). By applying the interleaved LO pulses to control the transmission gates (26, 28, 30, 32, 34, 36, 38, and 40) in the upmixer (720), the +I, −I, +Q, −Q input signals are interleaved over a plurality of phases of a carrier period to produce differential outputs (42, 44).
A transmitter circuit configured to perform IQ modulation by interleaving in-phase and quadrature signals, comprising:
A method of performing IQ modulation by interleaving in-phase and quadrature signals, comprising:
A method for generating matched differential interleaved local oscillator clock signals, comprising:
Dependencies are inferred from the claim text.