Method and device for frame and slot synchronization
AssigneeFreescale Semiconductor, Inc.
InventorsShlomo Beer-Gingold, Alexander Sverdlov, Michael Zarubinsky
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Abstract
A method slot and frame synchronization of in a wireless system, the method includes: processing samples and a pair of primary synchronization code forming sequences by a pair of serially coupled filters to provide primary results; finding, in response to the primary results, slots boundaries; processing selected samples and multiple pairs of secondary synchronization code forming sequences by at least a second filter of the pair of serially coupled filters to provide secondary results; wherein the selected samples correspond to the slots boundaries; and detecting secondary synchronization sequences included in a frame in response to the secondary results.
Claims15
A slot and frame synchronization method in a wireless system, the method comprising:
- processing samples and a pair of primary synchronization code forming sequences by a pair of serially coupled filters to provide primary results;
- finding, in response to the primary results, slots boundaries;
- processing selected samples and multiple pairs of secondary synchronization code forming sequences by at least a second filter of the pair of serially coupled filters to provide secondary results;
- wherein the selected samples correspond to the slots boundaries;
- and
- detecting secondary synchronization sequences included in a frame in response to the secondary results.
A device having slot and frame synchronization capabilities, the device comprises:
- a buffer, adapted to store samples;
- a first and second filters that form a pair of serially coupled filters that is configured to:
- process samples and a pair of primary synchronization code forming sequences to provide primary results;
- process selected samples and multiple pairs of secondary synchronization code forming sequences to provide secondary results;
- wherein the selected samples correspond to the slots boundaries;
- a boundary detection circuit that is configured to:
- find slots boundaries in response to the primary results;
- and
- detect secondary synchronization sequences included in a frame in response to the secondary results.
Dependencies are inferred from the claim text.