Adaptive noise suppression using a noise look-up table

A noise suppression system for a power supply network of an integrated circuit capable of executing one or more IC event sequences, the noise suppression system comprising:

• an integrated circuit event input for receiving a first IC event sequence to the integrated circuit;
• a first memory having one or more storage locations, each of said one or more storage locations configured to store a corresponding respective one of a first set of anti-noise response signatures, each of the first set of anti-noise response signatures corresponding to an anti-noise response associated with at least one of the one or more IC event sequences;
• a second memory configured to store a second set of correlations between the one or more IC event sequences and said one or more storage locations, said second memory being in communication with said integrated circuit event input for receiving the first IC event sequence and searching said second set of correlations for a first location of said one or more storage locations that includes a first anti-noise response signature corresponding to the first IC event sequence, said first memory using the first location to output the first anti-noise response signature;
• and
• an anti-noise generator in communication with said first memory for receiving the first anti-noise response signature from said first memory, said anti-noise generator generating an anti-noise response from the first anti-noise response signature in at least a portion of the power supply network at about the same time of execution of the first IC event sequence by the integrated circuit.

A noise suppression system for a power supply network of an integrated circuit capable of executing one or more IC event sequences, the noise suppression system comprising:

• an integrated circuit event input for receiving a first IC event sequence to the integrated circuit;
• a first memory having one or more storage locations, each of said one or more storage locations configured to store a corresponding respective one of a first set of anti-noise response signatures, each of the first set of anti-noise response signatures corresponding to an anti-noise response associated with at least one of the one or more IC event sequences;
• a second memory including a set of correlations between the one or more IC event sequences and said one or more storage locations, said second memory capable of receiving said first IC event sequence and outputting to said first memory an indication of a first storage location of said one or more storage locations that corresponds to the first IC event sequence, said outputting occurring within a predetermined number of clock cycles of the integrated circuit from the receiving of first IC event sequence by said first memory;
• and
• an anti-noise generator in communication with said first memory for receiving a first anti-noise response signature from said first memory, the first anti-noise response signature associated with said first storage location, said anti-noise generator generating an anti-noise response from the first anti-noise response signature in at least a portion of the power supply network at about the same time of execution of the first IC event sequence by the integrated circuit.