Back to results
US 8,077,531 B2Granted
Semiconductor integrated circuit including column redundancy fuse block
AssigneeHynix Semiconductor Inc.
InventorsKeun-Soo Song, Nak-Kyu Park
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes a semiconductor chip having an edge area and a bank area located an inner portion of the edge area, and a column redundancy fuse block disposed in the edge area.
Claims29
A semiconductor integrated circuit having an edge area and a bank area located at an inner portion of the edge area, comprising:
- a column redundancy fuse block having a fuse set array having a plurality of fuse sets including a plurality of column address fuses;
- and a fuse blowing information block configured to output a fuse blowing determination signal of a corresponding column based on a cutting state of the column address fuses, wherein the column redundancy fuse block is disposed in the edge area,
- wherein the fuse blowing information block includes:
- a fuse enable circuit unit configured to generate a fuse enable signal according to a row information signal and the cutting state of the plurality of column address fuses;
- and
- a fuse blowing determination circuit unit configured to receive the fuse enable signal and the row information signal to generate the fuse blowing determination signal.
3 more elements
A semiconductor integrated circuit having an edge area and a bank area located at an inner portion of the edge area, comprising:
- a plurality of banks arranged in the bank area along row and column directions at a regular interval;
- a column redundancy fuse block having a fuse set array disposed in the edge area substantially parallel to the row direction and a fuse blowing information block for detecting fuse blowing information in the fuse set array;
- and
- a column control block disposed in the bank area between the plurality of banks that are adjacent to each other along the column direction to output one of a column selection signal and a spare column selection signal by determining redundancy based on an output signal of the fuse blowing information block,
- wherein the output signal of the fuse blowing information block is inputted to the column control block through upper portions of a corresponding bank of the banks,
- wherein the fuse blowing information block includes:
- a fuse enable circuit unit configured to generate a fuse enable signal according to a block selection signal and a blowing of column address fuses when a row active signal is enabled;
- and
- a fuse blowing determination circuit unit configured to receive the fuse enable signal and the block selection signal to generate the output signal of the fuse blowing information block when the row active signal is enabled.
6 more elements
A semiconductor integrated circuit, comprising:
- an edge area having a column redundancy fuse block;
- a first bank disposed at a lower portion of the edge area;
- a first column control block disposed at a lower portion of the first bank;
- a second bank disposed at a lower portion of the first column control block;
- and
- a second column control block disposed at a lower portion of the second bank,
- wherein the column redundancy fuse block includes:
- a fuse set array having a plurality of fuse sets including a plurality of column address fuses;
- and
- a fuse blowing information block configured to output a fuse blowing determination signal of a corresponding column based on a cutting state of the column address fuses;
- wherein the fuse blowing information block includes:
- a fuse enable circuit unit configured to generate a fuse enable signal according to a block selection signal and a blowing of the column address fuses when a row active signal is enabled;
- and
- a fuse blowing determination circuit unit configured to receive the fuse enable signal and the block selection signal to generate the fuse blowing determination signal when the row active signal is enabled.
11 more elements
Dependencies are inferred from the claim text.