Methods, devices, and systems for dealing with threshold voltage change in memory devices
AssigneeMicron Technology, Inc.
InventorsZhenlei Shen, William H. Radke, Peter Feeley
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Abstract
The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.
Claims33
A memory device, comprising:
- an array of memory cells;
- and
- control circuitry having sense circuitry coupled to the array and an error correction code (ECC) decoder, wherein the control circuitry is configured to:
- determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell;
- and
- adjust the sense circuitry based on the determined changes and without using a reference cell;
- and
- wherein:
- the sense circuitry is configured to sense a state of the memory cells using a first voltage;
- the ECC decoder is configured to perform an error correction operation on the sensed state;
- and
- the sense circuitry is configured to sense a state of the memory cells using a second voltage if the error correction operation results in a failure.
A method for operating a memory device, comprising:
- determining changes in threshold voltages (Vts) associated with a number of memory cells without using a reference cell, wherein determining changes in the Vts associated with the number of memory cells includes:
- sensing Vts associated with the number of memory cells;
- and
- determining a number of voltages that correspond to a number of states associated with the number of memory cells using the sensed Vts, wherein each determined voltage corresponds to a respective one of the number of states;
- outputting the sensed Vts and the determined number of voltages to an error correction code (ECC) decoder;
- adjusting a voltage used to sense a state of the number of memory cells based on the determined changes and without using a reference cell;
- and
- sensing a state of the number of memory cells using the adjusted voltage.
A method for operating a memory device, comprising:
- sensing a state of a number of memory cells using a first voltage;
- performing an error correction operation on the sensed state;
- sensing a state of the number of memory cells using a second voltage if the error correction operation results in a failure;
- determining changes in threshold voltages associated with the number of memory cells without using a reference cell;
- and
- adjusting sense circuitry based on the determined changes and without using a reference cell.
A memory device, comprising:
- an array of memory cells;
- and
- control circuitry having sense circuitry coupled to the array, wherein:
- the sense circuitry is configured to sense threshold voltages (Vts) associated with the memory cells;
- and
- the control circuitry is configured to:
- determine a number of voltages that correspond to a number of states associated with the memory cells using the sensed Vts, wherein each determined voltage corresponds to a respective one of the number of states;
- and
- output the sensed Vts and the determined number of voltages to an error correction code decoder.
A method of operating a memory device, comprising:
- sensing a state of a number of memory cells using a first voltage that corresponds to a first state and a second voltage that corresponds to a second state;
- performing an error correction operation on the sensed state;
- and
- sensing a state of the number of memory cells using a third voltage that corresponds to the first state and a fourth voltage that corresponds to the second state only if the error correction operation results in a failure, wherein the error correction operation results in a failure if a number of errors associated with the state sensed using the first voltage and the second voltage exceeds a correction capability of an error correction code (ECC) decoder.
A memory device, comprising:
- an array of memory cells;
- and
- control circuitry having sense circuitry coupled to the array, wherein:
- the sense circuitry is configured to sense threshold voltages (Vts) associated with the memory cells;
- the control circuitry is configured to:
- determine a number of voltages that correspond to a number of states associated with the memory cells using the sensed Vts, wherein each determined voltage corresponds to a respective one of the number of states;
- and
- output the sensed Vts and the determined number of voltages to an error correction code decoder;
- and
- the sense circuitry is configured to sense a state of the memory cells using the determined voltages.
Dependencies are inferred from the claim text.