Method and apparatus for programming a multi-level memory
AssigneeMacronix International Co., Ltd.
InventorsHsin-Yi Ho, Chia-Ching Li, Chun-Hsiung Hung
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Abstract
A method of programming a memory device comprising a plurality of memory cells may include verifying a first memory cell targeted to a first level with a first preliminary voltage of a first program phase (PPV1′), programming the first memory cell targeted to the first level in the first program phase, and verifying the first memory cell with a first post program-verify voltage of the first program phase (PV1′) in which the first post program-verify voltage is different from the first preliminary voltage. A corresponding apparatus is also provided.
Claims6
A method of programming a memory device comprising a plurality of memory cells, comprising steps of:
- verifying a first memory cell targeted to a first level with a first preliminary voltage of a first program phase;
- programming the first memory cell targeted to the first level in the first program phase in response to verification of the first preliminary voltage not passing;
- verifying the first memory cell with a first post program-verify voltage of the first program phase, wherein the first post program-verify voltage is different from the first preliminary voltage;
- programming the first memory cell targeted to the first level in a second program phase;
- and
- verifying the first memory cell targeted to the first level with a first post program-verify voltage of the second program phase, wherein the first post program-verify voltage of the second program phase is different from the first post program-verify voltage of the first program phase.
A memory device, comprising:
- a memory array having a plurality of memory cells;
- and
- a controller for programming and verifying the memory cells, wherein the controller executes verifying a first memory cell targeted to a first level with a first preliminary voltage of a first program phase and programming the first memory cell targeted to the first level in the first program phase in response to verification of the first preliminary voltage not passing, then verifying the first memory cell with a first post program-verify voltage of the first program phase, wherein the first post program-verify voltage is different from the first preliminary voltage, and
- wherein the controller is further configured to:
- program the first memory cell targeted to the first level in a second program phase;
- and
- verify the first memory cell targeted to the first level with a first post program-verify voltage of the second program phase, wherein the first post program-verify voltage of the second program phase is different from the first post program-verify voltage of the first program phase.
Dependencies are inferred from the claim text.