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AssigneeSony Corporation
InventorsYoshihiko Kuroki, Tomohiro Nishi
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In an image display system, when a sequence of frames α, α+1, α+2, α+3, . . . , with a frame rate of m is given as an input video signal S1, a controller controls a frame memory to output a sequence of frames α, α+2, . . . , as an output video signal S2 at a frame rate of m/2 and a sequence of frames α+1, α+3, . . . , as an output video signal S3 at a frame rate of m/2 such that the timing of outputting each of frames α+1, α+3, . . . , of the output video signal S3 is delayed by 1/m with respect of the timing of outputting each of frames α, α+2, . . . , of the output video signal S2. By displaying the output video signals S3 and S2 in the above-described manner, a resultant motion image formed by a combination of the output video signals S3 and S2 is refreshed at an effective frame rate of m.
An image processing apparatus for processing an image signal to be displayed by an image display apparatus, the image processing apparatus comprising:
A method of processing, in an image processing apparatus including a storage unit, an image signal to be displayed by an image display apparatus, the method comprising:
A non-transitory storage medium including a computer-readable program stored thereon for causing a computer to execute a process on an image signal to be displayed by an image display apparatus using a storage unit, the process comprising:
Dependencies are inferred from the claim text.