RF power transistor packages with internal harmonic frequency reduction and methods of forming RF power transistor packages with internal harmonic frequency reduction

A packaged power device, comprising:

• a transistor including a control terminal and an output terminal and configured to operate at a fundamental operating frequency;
• a signal input lead coupled to the control terminal of the transistor;
• a signal output lead coupled to the output terminal of the transistor;
• an input-side harmonic reducer coupled to the control terminal of the transistor and configured to provide a short circuit or low impedance path from the control terminal to ground for signals at a harmonic frequency of the fundamental operating frequency wherein the harmonic reducer is connected to the control terminal of the transistor;
• a package that houses the transistor and the harmonic reducer, with the signal input lead and the signal output lead extending from the package;
• and
• an output-side harmonic reducer connected to the output terminal of the transistor;
• wherein the input-side harmonic reducer comprises a first capacitor having a first capacitance and the output-side harmonic reducer comprises a second capacitor having a second capacitance that is different from the first capacitance.

A packaged device, comprising:

• a transistor including a control terminal and an output terminal and configured to operate at a fundamental operating frequency;
• a signal input lead coupled to the control terminal of the transistor;
• a signal output lead coupled to the output terminal of the transistor;
• a harmonic reducer coupled to the control terminal of the transistor and configured to provide a short circuit or low impedance path from the control terminal to ground for signals at a harmonic frequency of the fundamental operating frequency, wherein the harmonic reducer comprises a series resonant circuit including an inductive element and a shunt capacitor connected in series to a ground terminal;
• a package that houses the transistor and the harmonic reducer, with the signal input lead and the signal output lead extending from the package;
• and
• a base, wherein the transistor is on the base and wherein the shunt capacitor is on the base.

A packaged device, comprising:

• a transistor including a control terminal and an output terminal and configured to operate at a fundamental operating frequency;
• a signal input lead coupled to the control terminal of the transistor;
• a signal output lead coupled to the output terminal of the transistor;
• a harmonic reducer coupled to the control terminal of the transistor and configured to provide a short circuit or low impedance path from the control terminal to around for signals at a harmonic frequency of the fundamental operating frequency;
• and
• a package that houses the transistor and the harmonic reducer, with the signal input lead and the signal output lead extending from the package;
• wherein the harmonic reducer comprises an open circuit quarter-wave transmission line stub.

A packaged RF power device, comprising:

• a transistor including a control terminal and an output terminal and configured to operate at a fundamental operating frequency;
• an RF signal input lead coupled to the control terminal of the transistor;
• an RF signal output lead coupled to the output terminal of the transistor;
• a harmonic reducer coupled to the control terminal and/or the output terminal of the transistor and configured to provide a short circuit or low impedance path from the control terminal and/or the output terminal to ground for signals at an Nth harmonic frequency of the fundamental operating frequency;
• and
• a package that houses the transistor and the harmonic reducer, with the RF signal input lead and the RF signal output lead extending from the package;
• wherein the transistor comprises a first transistor and the harmonic reducer comprises a first harmonic reducer, the package further comprising:
• a second transistor including a control terminal and an output terminal and configured to operate at the fundamental operating frequency, wherein the RF signal input lead is coupled to the control terminal of the second transistor, and the RF signal output lead is coupled to the output terminal of the second transistor;
• and
• a second harmonic reducer coupled to the control terminal and/or the output terminal of the second transistor and configured to provide a short circuit or low impedance path from the control terminal and/or the output terminal of the second transistor to ground for signals at an Mth harmonic frequency of the fundamental operating frequency;
• wherein the package also houses the second transistor and the second harmonic reducer.

A packaged power device, comprising:

• a transistor including a control terminal and an output terminal and configured to operate at a fundamental operating frequency;
• a signal input lead coupled to the control terminal of the transistor;
• a signal output lead coupled to the output terminal of the transistor;
• a harmonic reducer coupled to a first one of the control terminal or the output terminal of the transistor and configured to provide a short circuit or low impedance path from the control terminal and/or the output terminal to ground for signals at an Nth harmonic frequency of the fundamental operating frequency, where N>1;
• a package that houses the transistor and the harmonic reducer, with the input lead and the output lead extending from the package;
• and
• a further harmonic reducer housed in the package and coupled to a second one of the control terminal or the output terminal of the transistor, wherein the further harmonic reducer is configured to provide a second short circuit or low impedance path from the control terminal or the second output terminal to ground for signals at an Mth harmonic frequency of the fundamental operating frequency, where M>1 and M≠N.

A method of forming a packaged power device, comprising:

• mounting a transistor on a base, the transistor including a control terminal and an output terminal and being configured to operate at a fundamental operating frequency;
• forming a harmonic signal reducer on the base and connecting the harmonic signal reducer to the control terminal of the transistor, wherein the harmonic signal reducer is configured to provide a short circuit or low impedance path from the control terminal to ground for signals at an Nth harmonic frequency of the fundamental operating frequency, where N>1;
• providing a signal input lead and a signal output lead on opposite sides of the base;
• connecting the signal input lead to the control terminal and connecting the signal output lead to the output terminal;
• and
• forming a package housing on the transistor and the harmonic reducer, with the signal input lead and the signal output lead extending from the package;
• wherein forming the harmonic signal reducer comprises providing a capacitor on the base and forming a wire bond connection between the capacitor and the transistor.

A packaged device, comprising:

• a transistor including a control terminal and an output terminal;
• a signal input lead coupled to the control terminal of the transistor;
• a signal output lead coupled to the output terminal of the transistor;
• a harmonic reducer coupled to the control terminal of the transistor;
• and
• a base, wherein the transistor and the harmonic reducer are on the base, wherein the harmonic reducer includes an inductive element and a shunt capacitor.