Broadband high power amplifier

An integrated circuit, comprising:

• a first plurality of distributed amplification cells operatively coupled in a first string pair, wherein a conductive trace associated with the first string pair is a stepped structure, such that the associated inductance successively decreases from a first cell to a last cell of the first string pair, and wherein the stepped structure associated with the first string pair is a shared output line that combines each cell output of the first string pair to provide a first string pair output;
• a second plurality of distributed amplification cells operatively coupled in a second string pair, wherein a conductive trace associated with the second string pair is a stepped structure, such that the associated inductance successively decreases from a first cell to a last cell of the second string pair, and wherein the stepped structure associated with the second string pair is a shared output line that combines each cell output of the second string pair to provide a second string pair output;
• and
• a combiner for combining the first and second string pair outputs.

An integrated circuit, comprising:

• a first plurality of distributed amplification cells operatively coupled in a first string pair, wherein a conductive trace associated with the first string is a stepped structure, such that the associated inductance successively decreases from a first cell to a last cell of the first string pair, and wherein the stepped structure associated with the first string is a shared output line that combines each cell output of the first string pair to provide a first string pair output;
• a second plurality of distributed amplification cells operatively coupled in a second string pair, wherein a conductive trace associated with the second string pair is a stepped structure, such that the associated inductance successively decreases from a first cell to a last cell of the second string pair, and wherein the stepped structure associated with the second string pair is a shared output line that combines each cell output of the second string pair to provide a second string pair output;
• a third plurality of distributed amplification cells operatively coupled in a third string pair, wherein a conductive trace associated with the third string pair is a stepped structure, such that the associated inductance successively decreases from a first cell to a last cell of the third string pair, and wherein the stepped structure associated with the third string pair is a shared output line that combines each cell output of the third string pair to provide a third string pair output;
• a fourth plurality of distributed amplification cells operatively coupled in a fourth string pair, wherein a conductive trace associated with the fourth string pair is a stepped structure, such that the associated inductance successively decreases from a first cell to a last cell of the fourth string pair, and wherein the stepped structure associated with the fourth string pair is a shared output line that combines each cell output of the fourth string pair to provide a fourth string pair output;
• a first combiner for combining the first and second string pair outputs to provide a first intermediate power output;
• a second combiner for combining the third and fourth string pair outputs to provide a second intermediate power output;
• and
• a third combiner for combining the first and second intermediate power outputs;
• wherein each of the first, second, third, and fourth string pairs comprises transistors, and wherein the stepped structure associated with the first string pair is configured such that voltage input to one cell of the first string pair is within 5% of voltage input to the other cells of the first string pair.