Semiconductor package and method for packaging a semiconductor package
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsChang Ying Hung, Hsiao Chuan Chang, Tsung Yueh Tsai, Yi Shao Lai, Jian Cheng Chen, Wei Chi Yih, Ho Ming Tong
Life of this patent
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Abstract
A wire bonding structure includes a chip and a bonding wire. The chip includes a base material, at least one first metallic pad, a re-distribution layer and at least one second metallic pad. The first metallic pad is disposed on the base material. The re-distribution layer has a first end and a second end, and the first end is electrically connected to the first metallic pad. The second metallic pad is electrically connected to the second end of the re-distribution layer. The bonding wire is bonded to the second metallic pad.
Claims20
A semiconductor package comprising:
- a carrier;
- a chip disposed on the carrier, wherein the chip has a first surface and a second surface opposite to the first surface, and the chip comprises:
- a base material;
- a plurality of first metallic pads, one of the first metallic pads being disposed on the base material;
- a re-distribution layer having a first end and a second end, wherein the first end is electrically connected to the one of the first metallic pads;
- and
- a plurality of second metallic pads, one of the second metallic pads being electrically connected to the second end of the re-distribution layer and disposed on the first surface;
- a bonding wire for electrically connecting the chip to the carrier, wherein the bonding wire is bonded to the one of the second metallic pads, the bonding wire is made of non-gold material, and the hardness of the bonding wire is higher than that of gold;
- and
- a molding compound for sealing the chip and the bonding wire and covering the carrier,
- wherein the first metallic pads are arranged in a first arrangement direction, the second metallic pads are arranged in a second arrangement direction, and the second arrangement direction is different from the first arrangement direction.
A method for packaging a semiconductor package comprising:
- deposing a chip on a carrier, wherein the chip has a first surface and a second surface opposite to the first surface, and the chip comprises:
- a plurality of first metallic pads, a plurality of second metallic pads, and a re-distribution layer, the re-distribution layer has a first end and a second end, the first end is electrically connected to one of the first metallic pads, the second end of the re-distribution layer is electrically connected to one of the second metallic pads, and the one of the second metallic pads is disposed on the first surface;
- electrically connecting the chip to the carrier by a bonding wire, wherein the bonding wire is bonded to one of the second metallic pads, the bonding wire is made of non-gold material, and the hardness of the bonding wire is higher than that of gold;
- and
- sealing the chip and the bonding wire and covering the carrier by a molding compound, so as to form a package, wherein the first metallic pads are arranged in a first arrangement direction, the second metallic pads are arranged in a second arrangement direction, and the second arrangement direction is different from the first arrangement direction.
A semiconductor package comprising:
- a carrier;
- a chip disposed on the carrier, wherein the chip has a first surface and a second surface opposite to the first surface, and the chip comprises:
- a base material;
- a plurality of first metallic pads, one of the first metallic pads being disposed on the base material;
- a re-distribution layer having a first end and a second end, wherein the first end is electrically connected to the one of the first metallic pads;
- and
- a plurality of second metallic pads, one of the second metallic pads being electrically connected to the second end of the re-distribution layer and disposed on the first surface;
- a bonding wire for electrically connecting the chip to the carrier, wherein the bonding wire is bonded to the one of the second metallic pads;
- and
- a molding compound for sealing the chip and the bonding wire and covering the carrier,
- wherein the first metallic pads are arranged in a direction of straight line, the second metallic pads are arranged in a direction of non-straight line different from the direction of straight line.
Dependencies are inferred from the claim text.