Nitride semiconductor device having current confining layer
AssigneePanasonic Corporation
InventorsSatoshi Tamura, Ryo Kajitani
Life of this patent
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Abstract
A nitride semiconductor device includes an active layer formed between an n-type cladding layer and a p-type cladding layer, and a current confining layer having a conductive area through which a current flows to the active layer. The current confining layer includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The second semiconductor layer is formed on and in contact with the first semiconductor layer and has a smaller lattice constant than that of the first semiconductor layer. The third semiconductor layer is formed on and in contact with the second semiconductor layer and has a lattice constant that is smaller than that of the first semiconductor layer and larger than that of the second semiconductor layer.
Claims8
A nitride semiconductor device comprising:
- an n-type cladding layer formed on a substrate;
- an active layer formed on the n-type cladding layer;
- a current confining layer formed on the active layer and having a recess portion;
- and
- a p-type cladding layer formed on the current confining layer,
- wherein the current confining layer includes a first semiconductor layer, a second semiconductor layer formed on and in contact with the first semiconductor layer, and a third semiconductor layer formed on and in contact with the second semiconductor layer,
- the second semiconductor layer has a smaller lattice constant than a lattice constant of the first semiconductor layer,
- the third semiconductor layer has a lattice constant that is smaller than the lattice constant of the first semiconductor layer and larger than the lattice constant of the second semiconductor layer, and
- the recess portion of the current confining layer from which parts of the third semiconductor layer and the second semiconductor layer are removed serves as a conductive area through which a current flows to the active layer, and is configured so that the recess portion passes through the third semiconductor layer and a portion of the second semiconductor layer such that the recess portion does not extend completely through the second semiconductor layer.
Dependencies are inferred from the claim text.