SRAM bit cell with self-aligned bidirectional local interconnects
AssigneeGlobalfoundries Inc.
InventorsRichard T. Schultz, Donald R. Weiss
Life of this patent
Estimating the term…
Abstract
Improved SRAMs are formed with significantly reduced local interconnect to gate shorts, by a technique providing bidirectional, self-aligned local interconnects, employing a gate hard mask over portions of the gates not connected to the local interconnects. Embodiments include forming a gate hard mask over gates, forming bidirectional trenches overlying portions of the gate electrodes and active silicon regions, etching the hard mask layer to expose regions of the gate electrodes that are to connect to local interconnects, and filling the trenches with conductive material to form self-aligned local interconnects.
Claims10
A method of fabricating a static random access memory (SRAM), the method comprising:
- forming active silicon regions on a substrate;
- forming gate electrodes over the active silicon regions;
- forming a hard mask layer over an upper surface of the gate electrodes;
- forming an etch stop layer over the hard mask layer and the active silicon regions;
- forming trenches down to the etch stop layer, the trenches overlying portions of the gate electrodes and active silicon regions;
- removing and exposing portions of the active silicon regions;
- after removing the etch stop layer, etching the hard mask layer to expose a portion of each gate electrode underlying trenches;
- and
- filling the trenches with conductive material to form self-aligned local interconnects.
A method of fabricating a static random access memory (SRAM), the method comprising:
- forming active silicon regions on a substrate;
- forming gate electrodes over the active silicon regions;
- forming a hard mask layer over an upper surface of the gate electrodes;
- forming an etch stop layer over the hard mask layer and the active silicon regions;
- forming self-aligned local interconnect trenches over portions of the gate electrodes and exposing portions of the active silicon regions by:
- etching down to the etch stop layer;
- and
- removing the etch stop layer,
- wherein the self-aligned local interconnect trenches extend in two directions perpendicular to each other;
- after forming self-aligned local interconnect trenches, etching the hard mask layer to expose a portion of each gate electrode underlying self-aligned local interconnect trenches;
- and
- filling the self-aligned local interconnect trenches with tungsten to form local interconnects which extend in two directions perpendicular to each other.
Dependencies are inferred from the claim text.