Method of fabricating semiconductor device

A manufacturing method of a semiconductor device including a trench gate MISFET, comprising:

• step (a) preparing a semiconductor substrate having a semiconductor layer thereon, said semiconductor layer having a top surface, said semiconductor substrate having a bottom surface, and said semiconductor substrate and semiconductor layer having a first conduction type;
• step (b) forming a trench on the top surface of the semiconductor layer;
• step (c) after step (b), forming a first insulating film over an inner surface of the trench including a side wall and an edge portion of the trench by a thermal oxidation method, said edge portion being a portion of intersection of the inner surface of the trench and a major surface of the semiconductor substrate;
• step (d) after step (c), forming a second insulating film on the first insulating film by a deposition method, said first and second insulating films being formed so as to cover the edge portion of the trench, and said first and second insulating film acting as a gate insulating film of the MISFET;
• step (e) after step (d), forming a gate electrode of the MISFET on the second insulating film in the trench;
• step (f) after step (e), forming a channel forming region of the MISFET in the semiconductor layer having the first conduction type, said channel forming region having a second conduction type opposite to the first conduction type;
• and
• step (g) after step (e), forming a source region of the MISFET on the channel forming region in the semiconductor layer, said source region having the first conduction type,
• wherein, after said step (d), a thickness of said second insulating film formed over said sidewall of said trench is greater than a thickness of said first insulating film formed over said sidewall of said trench, and
• wherein said second insulating film includes nitrogen.

A manufacturing method of a semiconductor device including a trench gate MISFET, comprising:

• step (a) preparing a semiconductor substrate having a semiconductor layer thereon, said semiconductor layer having a top surface, said semiconductor substrate having a bottom surface, and said semiconductor substrate and semiconductor layer having a first conduction type;
• step (b) forming a trench on the top surface of the semiconductor layer;
• step (c) after step (b), forming a first insulating film over an inner surface of the trench including a side wall and an edge portion of the trench;
• step (d) after step (c), forming a second insulating film on the first insulating film in the trench, said first and second insulating films being formed so as to cover the edge portion of the trench;
• step (e) after step (d), forming a gate electrode of the MISFET on the second insulating film in the trench;
• step (f) after step (e), forming a channel forming region of the MISFET in the semiconductor layer, said channel forming region having a second conduction type opposite to the first conduction type;
• and
• step (g) after step (e), forming a source region of the MISFET on the channel forming region in the semiconductor layer, said source region having the first conduction type,
• wherein, after said step (d), a thickness of said second insulating film formed over said sidewall of said trench is greater than a thickness of said first insulating film formed over said sidewall of said trench, and
• wherein said second insulating film includes nitrogen.

A manufacturing method of a semiconductor device including a trench gate MISFET, comprising:

• step (a) preparing a semiconductor substrate having a top surface and a bottom surface opposite to the top surface, said semiconductor substrate having a first conduction type;
• step (b) forming a trench on the top surface of the semiconductor layer;
• step (c) after step (b), forming a first insulating film on an inner surface of the trench including a side wall;
• step (d) after step (c), forming a second insulating film on the first insulating film in the trench, said first and second insulating films being formed so as to cover an edge portion of the trench;
• step (e) after step (d), forming a gate electrode of the MISFET on the second insulating film in the trench;
• step (f) after step (e), forming a channel forming region of the MISFET over the semiconductor substrate, said channel forming region having a second conduction type opposite to the first conduction type;
• and
• step (g) after step (e), forming a source region of the MISFET over the semiconductor substrate, said source region having the first conduction type,
• wherein, after said step (d), a thickness of said second insulating film formed over said sidewall of said trench is greater than a thickness of said first insulating film formed over said sidewall of said trench, and
• wherein said second insulating film includes nitrogen.