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US 8,060,453 B2Granted
System and method for funds recovery from an integrated postal security device
AssigneePitney Bowes Inc.
InventorsRobert J. Tolmie, Jr., Douglas A. Clark, Mark A. Scribe
Life of this patent
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Abstract
Systems and methods for providing funds recovery for mailing machines including integrated circuits such as those used in postal security devices are described, and in certain configurations, systems and methods for recovering data such as postal funds records from a partially disabled single integrated circuit in a postal security device are described.
Claims16
A mailing machine for printing evidence of postage payment on mail pieces comprising:
- a printer subsystem for printing indicia on a mail pieces;
- a first processor operatively connected to the printer subsystem;
- and
- a postal security device operatively connected to the first processor, the postal security device comprising a primary single integrated circuit including:
- a postal security device processor used to process requests for the evidence of postage payment;
- a plurality of non-volatile memory registers operatively connected to the postal security device processor for storing postal funds record data;
- and
- a primary bus and control circuit operatively connecting the postal security device processor to the non-volatile memory registers for read and write access;
- a secondary memory access device operatively connected to the non-volatile memory registers to provide read only access to the plurality of non-volatile memory registers, wherein,
- the secondary memory access device erases a secure memory location before providing read only access to the plurality of non-volatile memory registers.
7 more elements
A postal security device for processing requests for evidence of postage payment comprising a primary single integrated circuit including:
- a postal security device processor used to process the requests for evidence of postage payment;
- a plurality of non-volatile memory registers operatively connected to the postal security device processor for storing postal funds record data;
- and
- a primary bus and control circuit operatively connecting the postal security device processor to the non-volatile memory registers for read and write access;
- a secondary memory access device operatively connected to the non-volatile memory registers to provide read only access to the plurality of non-volatile memory registers, wherein,
- the secondary memory access device erases a secure memory location before providing read only access to the plurality of non-volatile memory registers.
3 more elements
Dependencies are inferred from the claim text.