Bad block identifying method for flash memory, storage system, and controller thereof
AssigneePhison Electronics Corp.
InventorsChih-Jen Hsu, Yi-Hsiang Huang
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Abstract
A bad block identifying method for a flash memory, a storage system, and a controller thereof are provided. The bad block identifying method includes determining whether a programming error occurs in a block of the flash memory after the block is programmed and marking the block as a bad block when the programming error successively occurs in the block. Since the block is determined to be a bad block only when the programming error repeatedly occurs in the block, misjudgment of bad block in the flash memory can be avoided and accordingly the lifespan of the flash memory storage system can be prolonged.
Claims26
A bad block identifying method, for a flash memory, wherein the flash memory has a plurality of blocks and the blocks are grouped logically into at least a data area and a spare area, the bad block identifying method comprising:
- programming a first block among the blocks;
- detecting whether a programming error occurs in the first block after the first block is programmed;
- when the programming error does not occur in the first block after the first block is programmed, resetting a programming error count corresponding to the first block;
- when the programming error occurs in the first block after the first block is programmed, increasing the programming error count corresponding to the first block by one and determining whether the programming error count corresponding to the first block is equal to an upper error threshold;
- when the programming error count corresponding to the first block is not equal to the upper error threshold, moving the first block to the spare area;
- and
- when the programming error count corresponding to the first block is equal to the upper error threshold, marking the first block as a bad block.
A controller, for controlling a flash memory of a storage system, wherein the flash memory has a plurality of blocks, the controller comprising:
- a microprocessor unit, configured to program a first block among the blocks;
- a flash memory interface, coupled to the microprocessor unit and configured to access the flash memory;
- a buffer memory, coupled to the microprocessor unit and configured to temporarily store data;
- and
- a memory management module, coupled to the microprocessor unit and configured to logically group the blocks into at least a data area and a spare area and detect whether a programming error occurs in the first block after the microprocessor unit programs the first block,
- wherein when the programming error does not occur in the first block after the first block is programmed, the memory management resets a programming error count corresponding to the first block,
- wherein when the programming error occurs in the first block after the first block is programmed, the memory management module increases the programming error count corresponding to the first block by one and determines whether the programming error count corresponding to the first block is equal to an upper error threshold,
- wherein when the programming error count corresponding to the first block is not equal to the upper error threshold, the memory management module moves the first block to the spare area,
- wherein when the programming error count corresponding to the first block is equal to the upper error threshold, the memory management module marks the first block as a bad block when the programming error successively occurs in the block.
A storage system, comprising:
- a flash memory, for storing data, wherein the flash memory has a plurality of blocks;
- a controller, coupled to the flash memory, wherein the controller is configured to logically group the blocks into at least a data area and a spare area, program a first block among the blocks and detect whether a programming error occurs in the first block after the first block is programmed;
- and
- a transmission interface, coupled to the controller and configured to connect to a host,
- wherein when the programming error does not occur in the first block after the first block is programmed, the controller resets a programming error count corresponding to the first block,
- wherein when the programming error occurs in the first block after the block is programmed, the controller increases the programming error count corresponding to the first block by one and determines whether the programming error count corresponding to the first block is equal to an upper error threshold,
- wherein when the programming error count corresponding to the first block is not equal to the upper error threshold, the controller moves the first block to the spare area,
- wherein when the programming error count corresponding to the first block is equal to the upper error threshold, the controller marks the first block as a bad block.
Dependencies are inferred from the claim text.