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US 8,046,628 B2Granted
Failure recovery memory devices and methods
AssigneeMicron Technology, Inc.
InventorDavid R. Resnick
Life of this patent
Estimating the term…
Abstract
Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one configuration shown, the serial chain of memory devices includes a chain of devices where each device is a stacked die memory device. Methods are described that show using the error recovery device in write operations and data recovery operations.
Claims21
A memory system, comprising:
- a plurality of memory devices in a serial chain, including:
- a number of memory devices;
- an error recovery device, wherein the memory system is configured to store error recovery data in the error recovery device;
- and
- wherein the plurality of memory devices include a plurality of solid state memory devices, wherein each solid state memory device includes a request XOR logic block and a response XOR logic block.
2 more elements
A memory system, comprising:
- a plurality of memory devices in a serial chain, at least one of the memory devices is a stacked chip memory device, the stacked chip memory device including:
- a stack of memory dies, including a number of memory vaults;
- a logic die stacked with the stack of memory dies, wherein the logic die includes a number of memory controllers corresponding to the number of memory vaults;
- wherein at least one of the memory devices is configured as an error recovery device, and the memory system is configured to store error recovery data in the error recovery device.
1 more element
A solid state memory device, comprising:
- a memory request input;
- a memory request output configured to pass on memory requests to a downstream memory device;
- and
- at least one logic block to form error recovery data configured to be passed on to a downstream memory device.
1 more element
A memory device, comprising:
- a stack of memory dies;
- a logic die stacked with the stack of memory dies, wherein the logic die includes:
- a request input path configured for serial communication through the memory device;
- a response output path configured for serial communication through the memory device;
- a first logic block coupled to the input path to form error recovery data;
- a second logic block coupled to the output path to recover data using the error recovery data;
- and
- wherein the first logic block is configured to form error recovery data as a packet and to change a packet header to point to a downstream error recovery device in a serial chain.
5 more elements
A method of writing data, comprising:
- sending new data to be written to a selected memory device in a chain of serial memory devices;
- calculating new error recovery data in the selected memory device using data currently in the selected memory device and the new data;
- writing the new data in the selected memory device;
- passing the new error recovery data to an error recovery device at an end of the chain;
- and
- modifying old error recovery data in the error recovery device using the new error recovery data.
3 more elements
A method of recovering data in a failing device, comprising:
- sending a recovery request down a chain of serial memory devices;
- placing data into a local logic block in each memory device in the chain, except the failing device, as the request passes down the chain of memory devices toward an error recovery device at the end of the chain;
- returning error recovery data from the error recovery device back up the chain;
- and
- combining the data from the local logic blocks in each memory device, except the failing device, with the error recovery data to reconstruct the data from the failing device.
2 more elements
A memory system, comprising:
- a plurality of memory sub-chains, the sub-chains arranged in a serial chain, wherein each sub-chain includes:
- a plurality of memory devices in a serial chain, including:
- a number of memory devices;
- an error recovery device at an end of the memory sub-chain to store error recovery data for all of the number of memory devices in the serial chain;
- and
- an error recovery sub-chain at the end of the serial chain of memory sub-chains, wherein the error recovery sub-chain is configured to store error recovery data of the plurality of memory sub-chains.
3 more elements
Dependencies are inferred from the claim text.