US 8,046,622 B2 · Dynamically scaling apparatus for a system on chip power voltage

Abstract

A system for dynamically scaling a power voltage including a system on chip (SoC) and a power control circuit. The SoC includes a plurality of application circuits. The SoC is configured to generate internal clock signals in response to an externally supplied clock signal. The SoC also generates a target voltage that changes based on a change of an operating current. The internal clock signals are respectively provided to the application circuits. The operating current is a sum or total current of the application circuits. The power control circuit generates an internal power voltage based on the target voltage and provides the internal power voltage to the SoC. The system for dynamically scaling a power voltage including a SoC may decrease power consumed in the SoC because the system of dynamically scaling a power voltage decreases a required voltage margin by changing a target voltage before a transition of the SoC current.

Claims19

Dependent claims

A system dynamically scaling a variable power voltage, the system comprising:

a system on chip (SoC) that receives the power voltage and an external clock signal, and comprises a plurality of application circuits, the SoC configured to generate a plurality of internal clock signals in response to the external clock signal and selectively enable or disable application of each one of the plurality of internal clock signals to a corresponding one of the plurality of application circuits, the SOC further configured to generate a variable target voltage that changes in response to a change in an operating current for the SoC, wherein the change in the operating current is estimated in response to a number of enabled internal clock signals among the plurality of internal clock signals;
and
a power management unit providing the power voltage to the SoC in response to the target voltage.

A system on chip (SoC) operating in response to an externally provided and variable power voltage and an external clock, the SoC comprising:

a plurality of application circuits, each operating in response to a corresponding one of a plurality of internal clock signals;
a micro controller unit (MCU) configured to generate (1) a plurality of internal clock enable signals, each corresponding to one of the plurality of internal clock signals, (2) an estimate of a change in an operating current for the SoC, and (3) a target voltage that varies in relation to the estimate of the change in the operating current, wherein the operating current is a total current consumed by operation of at least one of the plurality of application circuits;
and
an internal clock generation unit configured to respectively generate at least one of the plurality of internal clock signals in response to the external clock signal and at least one of the corresponding plurality of internal clock enable signals,
wherein the estimate of the change in the operating current is determined in accordance with the at least one of the plurality of internal clock signals generated in response to the at least one of the corresponding plurality of internal clock enable signals.

2 more elements

Dependencies are inferred from the claim text.

Dynamically scaling apparatus for a system on chip power voltage

Life of this patent

Dynamically scaling apparatus for a system on chip power voltage

Life of this patent

Abstract

Claims19