Method and apparatus for the synchronization of distributed caches
AssigneeIntel Corporation
InventorsRobert T. George, Mathew A. Lambert, Tony S. Rand, Robert G. Blankenship, Kenneth C. Creta
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Abstract
A method and apparatus for the synchronization of distributed caches. More particularly, the present invention to cache memory systems and more particularly to a hierarchical caching protocol suitable for use with distributed caches, including use within a caching input/output (I/O) hub.
Claims30
In a cache-coherent device including a coherency engine and a plurality of client ports, a method for processing a transaction, comprising:
- receiving a transaction request for a data element at one of said plurality of client ports, said transaction request includes an address;
- determining whether said address is present in one of a plurality of sub-unit caches, each of said sub-unit caches assigned to one of said plurality of client ports;
- and
- tracking with said coherency engine the state information of said data element in said plurality of sub-unit caches according to a coherency protocol wherein the state information is set to an intermediate state upon detection of a conflict and released from the intermediate state upon resolution of the conflict.
A cache-coherent device comprising:
- a plurality of client ports, each to be coupled to one of a plurality of port components, and each to be coupled to one or more of a plurality of sub-unit caches;
- and
- a coherency engine coupled to said plurality of sub-unit caches, wherein said coherency engine is to track the state information of a data element cached in said plurality of sub-unit caches according to a coherency protocol wherein the state information is set to an intermediate state upon detection of a conflict and released from the intermediate state upon resolution of the conflict.
A processing system comprising:
- a processor;
- a plurality of port components;
- and
- a cache-coherent device coupled to said processor and including a plurality of client ports, each coupled to one of said plurality of port components, said cache-coherent device further including a plurality of sub-unit caches, each coupled to one of said plurality of client ports and assigned to one of said plurality of port components, a coherency engine coupled to said plurality of sub-unit caches, wherein said coherency engine is to track the state information of a data element cached in said plurality of sub-unit caches according to a coherency protocol wherein the state information is set to an intermediate state upon detection of a conflict and released from the intermediate state upon resolution of the conflict.
A set of instructions residing in a storage medium, said set of instructions capable of being executed by a processor to implement a method for processing a transaction, comprising:
- receiving a transaction request for a data element at one of a plurality of client ports, said transaction request includes an address;
- determining whether said address is present in one of a plurality of sub-unit caches, each of said sub-unit caches assigned to one of said plurality of client ports;
- and
- tracking with a coherency engine the state information of said data element in said plurality of sub-unit caches according to a coherency protocol, wherein the state information is set to an intermediate state upon detection of a conflict and released from the intermediate state upon resolution of the conflict.
Dependencies are inferred from the claim text.