Stream ciphering of the content of a memory external to a processor
AssigneesSTMicroelectronics S.r.l., Proton World International N.V.
InventorsJoan Daemen, Pierre Guillemin, Claude Anguille, Michel Bardouillet, Pierre-Yvan Liardet, Yannick Teglia
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Abstract
A method and an element of ciphering by an integrated processor of data to be stored in a memory, including applying a ciphering algorithm which is a function of a key specific to the integrated circuit and of an initialization vector, and of memorizing at least the ciphered data, the initialization vector depending at least on the address of storage of the data in the memory.
Claims20
A method of ciphering by an integrated processor of data to be stored in a memory, comprising applying a ciphering algorithm, which is a function of at least one key specific to the integrated circuit and of an initialization vector, to obtain ciphered data, wherein the initialization vector includes at least an address of storage of the ciphered data in the memory and a differentiation value associated with the address of storage, the differentiation value having a different value on each writing at a same address of storage in the memory, wherein the differentiation value is provided by at least one counter incremented or decremented on each writing at a same address, the ciphering algorithm being a function of the address of storage and the differentiation value, and storing at least the ciphered data and the differentiation value in the memory at the address of storage, only the differentiation value of the initialization vector being stored with the ciphered data in the memory at the address of storage.
An electronic assembly comprising at least one memory external to an integrated circuit provided with a processor, comprising means for applying a ciphering algorithm, which is a function of at least one key specific to the integrated circuit and of an initialization vector, to obtain ciphered data, wherein the initialization vector includes at least an address of storage of the ciphered data in the memory and a differentiation value associated with the address of storage, the differentiation value having a different value on each writing at a same address of storage in the memory, wherein the differentiation value is provided by at least one counter incremented or decremented on each writing at a same address, the ciphering algorithm being a function of the address of storage and the differentiation value, and means for storing at least the ciphered data and the differentiation value in the memory at the address of storage, only the differentiation value of the initialization vector being stored with the ciphered data in the memory at the address of storage.
An electronic assembly comprising a memory and a processor, the processor being configured to:
- apply a ciphering algorithm to data to obtain ciphered data, the ciphering algorithm having as parameters a key associated with the processor and an initialization vector which includes as components at least a storage address in the memory and a differentiation value having a different value on each writing at a same storage address in the memory, wherein the differentiation value is provided by at least one counter incremented or decremented on each writing at the storage address and wherein the ciphering algorithm is a function of the storage address and differentiation value components of the initialization vector;
- and
- store the ciphered data and the differentiation value at the storage address in the memory, only the differentiation value component of the initialization vector being stored with the ciphered data in the memory at the storage address.
A method for ciphering data using at least one processor, comprising:
- generating an initialization vector which includes as components at least a storage address in a memory and a differentiation value having a different value on each writing at a same storage address in the memory;
- applying a ciphering algorithm to the data to obtain ciphered data, the ciphering algorithm having as parameters the storage address and the differentiation value of the initialization vector and a key associated with the at least one processor, wherein the differentiation value is provided by at least one counter incremented or decremented on each writing at the storage address and wherein the ciphering algorithm is a function of the storage address and differentiation value components of the initialization vector;
- and
- storing the ciphered data and the differentiation value at the storage address, only the differentiation value component of the initialization vector being stored with the ciphered data in the memory at the storage address.
A method for deciphering ciphered data stored at storage address in a memory, comprising:
- generating an initialization vector which includes as components at least the storage address and a differentiation value stored at the storage address, the differentiation value having a different value on each writing at a same storage address in the memory, only the differentiation value component of the initialization vector being stored with the ciphered data in the memory at the storage address, wherein the differentiation value is provided by at least one counter incremented or decremented on each writing at the storage address;
- and
- using at least one processor to apply a deciphering algorithm to the ciphered data, the deciphering algorithm being a function of the storage address and differentiation value components of the initialization vector and a key associated with the at least one processor.
Dependencies are inferred from the claim text.