Spread spectrum clock generator

A chip, comprising:

• a first circuit to provide two or more different reference phase clocks derived from a reference clock having a reference clock frequency;
• a phase interpolator coupled to said first circuit to generate an output clock having a controllable phase based on selected first and second reference phase clocks from the two or more reference phase clocks;
• and
• control circuitry to rotate the controllable phase at a lower frequency than the reference clock frequency to cause the output clock to provide a spread spectrum clock with a desired profile.